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Re: amigappc test kernel for CSPPC and BPPC



On Mon, Dec 13, 2010 at 11:49:10PM +0200, Jukka Andberg wrote:

> The combination of dcbz and memory coherence just doesn't seem to work
> (causes freeze), even when fast memory is used. No idea why.

Maybe you should read the PowerPC architecture documents again? In short,
only from memory: 

I think dcbz and friends work by operating on cache lines. Not the
memory behind cache lines, but cache lines themselves (so dcbz gets
a cache line for address foo, and zeros it, without first reading it
in - but it is marked dirty and will be written back using normal cache
operation). So they only work, IIRC, with normal cached operation.

I don't know what happens when you try them in coherent mode, and
even if it is defined at all, I don't know if csppc or bzppc hardware
have the necessary sort of access cycles implemented.

(others are, I think: dcbt - tell the memory interface that you'll
operate on address foo soon, and some more? Don't remember right now.)

Vaguely related issue that has to be kept in mind: 68k CAS and on
68020-40 CAS2 don't work in chip memory, because chip memory doesn't
implement read-modify-write cycles.

        -is


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