[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Re: current kernel on amd64 crashes
On Saturday 12 January 2008 08:18:00 David Laight wrote:
> On Fri, Jan 11, 2008 at 08:35:43PM +0100, Joerg Sonnenberger wrote:
> > On Thu, Jan 10, 2008 at 08:41:35PM +0000, David Laight wrote:
> > > > Could it be this change ?
> > > > - low = inb(IO_TIMER1 + TIMER_CNTR0);
> > > > - high = inb(IO_TIMER1 + TIMER_CNTR0);
> > > > - count = rtclock_tval - ((high << 8) | low);
> > > > -
> > > > + /* insb to make the read atomic */
> > > > + insb(IO_TIMER1+TIMER_CNTR0, &rdval, 2);
> > > > + count = rtclock_tval - rdval;
> > >
> > > I don't know, but I also have no reason to believe that the comment
> > > (and hence the modified code) is correct.
> > The only real diff is that you won't get interrupts processed in the
> > middle, I think.
> You think incorrectly :-) the x86 'rep' instructions are interruptable
> between the iterations.
That's right unless you run in a virtualized environment where the hypervisor
emulates the 'rep ins' instruction. The hypervisor guarantees an atomic
execution of this instruction for the guest while this is not the case
on real hardware.
Main Index |
Thread Index |