Port-amd64 archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

Re: constraints on rbus_min_start?

David Laight wrote:
On Sun, Jan 06, 2008 at 12:22:23AM -0500, Steven M. Bellovin wrote:
For amd64 (and i386 with PAE) the address allocated almost certainly
has to be inside the 'address hole' below 4GB.

This raises more questions than it answers.  If I understand the
problem correctly, the "hole" is reserved for memory-mapped PCI
devices.  Can the Cardbus range overlap that?  If so, how?  Assorted
web pages list the hole with various address ranges from 3.5G-4G to
3.75G to 4G.  How can I tell how much of that is allocated?

Cardbus is PCI :-)
The only way to determine the used addresses is to enumerate all the devices.
That is potentially dangerous since you have to rewrite the BARs with a
base address of 0 in order to determine the size. Presumably the NetBSD
PCI device grope code will have done this during boot and remembered
the addresses that are in use.
On a more pragmatic and more immediate note, what should I set it to manually? I have a 3G machine; I haven't yet found a setting that will avoid messages like these in dmesg:

cbb0 at pci6 dev 0 function 0: Ricoh 5C476 PCI-CardBus bridge (rev. 0xba)
cbb0: can't map socket base address 0xf8300000
cbb0: can't map socket base address 0xffffffff804e8a0f: io mode
cbb0: interrupting at ioapic0 pin 16 (irq 10)
cardslot0 at cbb0 slot 0 flags 0

Those error messages don't look right for the error you claim to be seeing.
Failing to 'map' an address tends to imply that it has allocated one
(and 0xf8300000 looks reasonable) but there are problems assigning it a KVA.
The io address of 0xffffffff804e8a0f certainly looks bogus - possibly
only sign extended from 32 to 64 bits somewhere!

Simple -- pci6 doesn't have memory space accesses enabled. I have the same machine:

pci6 at ppb5 bus 21
pci6: i/o space enabled


Home | Main Index | Thread Index | Old Index