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Re: constraints on rbus_min_start?



Quoting David Laight <david%l8s.co.uk@localhost>:

On Sat, Jan 05, 2008 at 07:18:55PM +0000, Steven M. Bellovin wrote:
I'd like to port the code from arch/i386 that dynamically calculates the
value for rbus_min_start from the memory size.  Are there any
particular constraints I should be aware of for that value?

The i386 code in machdep.c is

#if NCARDBUS > 0
        /* Tell RBUS how much RAM we have, so it can use heuristics.
        rbus_min_start_hint(ptoa(physmem));
#endif

and rbus_min_start_hint in rbus_machdep.c picks an appropriate value
based on that number.  I'm assuming that any amd64 has a fair amount of
memory and address lines, so simply rounding up to the next-highest 1G
boundary will work.  But -- do I need to leave any gaps between real
memory and rbus_min_start?  What boundary does it need to be at?

For amd64 (and i386 with PAE) the address allocated almost certainly
has to be inside the 'address hole' below 4GB.

This raises more questions than it answers.  If I understand the
problem correctly, the "hole" is reserved for memory-mapped PCI
devices.  Can the Cardbus range overlap that?  If so, how?  Assorted
web pages list the hole with various address ranges from 3.5G-4G to
3.75G to 4G.  How can I tell how much of that is allocated?

On a more pragmatic and more immediate note, what should I set it to manually? I have a 3G machine; I haven't yet found a setting that will avoid messages like these in dmesg:

cbb0 at pci6 dev 0 function 0: Ricoh 5C476 PCI-CardBus bridge (rev. 0xba)
cbb0: can't map socket base address 0xf8300000
cbb0: can't map socket base address 0xffffffff804e8a0f: io mode
cbb0: interrupting at ioapic0 pin 16 (irq 10)
cardslot0 at cbb0 slot 0 flags 0



--Steve Bellovin, http://www.cs.columbia.edu/~smb




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