qemu-nvmm: fix bug

[Maxime Villard <max%m00nbsd.net@localhost>]

Module Name:	pkgsrc-wip
Committed By:	Maxime Villard <max%m00nbsd.net@localhost>
Pushed By:	maxv
Date:		Wed Feb 20 15:02:51 2019 +0100
Changeset:	b027886f3bc5bccbbdbd207279cb6f0b4af577ff

Modified Files:
	qemu-nvmm/distinfo
	qemu-nvmm/patches/patch-nvmm-support

Log Message:
qemu-nvmm: fix bug

Forgot to take care of XCR0, on recent CPUs that support XSAVE this could
cause guest crashes.

To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=b027886f3bc5bccbbdbd207279cb6f0b4af577ff

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

diffstat:
 qemu-nvmm/distinfo                   | 2 +-
 qemu-nvmm/patches/patch-nvmm-support | 6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diffs:
diff --git a/qemu-nvmm/distinfo b/qemu-nvmm/distinfo
index a56d90803e..2271df5cb5 100644
--- a/qemu-nvmm/distinfo
+++ b/qemu-nvmm/distinfo
@@ -16,7 +16,7 @@ SHA1 (patch-hw_display_omap__dss.c) = 6b13242f28e32346bc70548c216c578d98fd3420
 SHA1 (patch-hw_net_etraxfs__eth.c) = e5dd1661d60dbcd27b332403e0843500ba9544bc
 SHA1 (patch-hw_net_xilinx__axienet.c) = ebcd2676d64ce6f31e4a8c976d4fdf530ad5e8b7
 SHA1 (patch-hw_usb_dev-mtp.c) = 66543b5559d92f8e2fa9a6eb85e5dfe7c1ad3339
-SHA1 (patch-nvmm-support) = 525c325f9dd57d2873562a64952b93f6653f691c
+SHA1 (patch-nvmm-support) = 8a7bc17c89cf1fc54d3b185ff56a8c4058581b9f
 SHA1 (patch-target_arm_cpu.h) = 0f70a35900c7cc3124dc11969643e0eef6ad6af5
 SHA1 (patch-target_arm_helper.c) = 08f9425422080442a2c90bb252423bab38651ae4
 SHA1 (patch-tests_Makefile.include) = 42345d697cb2e324dccf1d68bd8d61e8001c6162
diff --git a/qemu-nvmm/patches/patch-nvmm-support b/qemu-nvmm/patches/patch-nvmm-support
index 380b309b54..5687865ae8 100644
--- a/qemu-nvmm/patches/patch-nvmm-support
+++ b/qemu-nvmm/patches/patch-nvmm-support
@@ -376,8 +376,8 @@ Add NVMM support.
  obj-$(CONFIG_SEV) += sev.o
  obj-$(call lnot,$(CONFIG_SEV)) += sev-stub.o
 --- target/i386/nvmm-all.c	1970-01-01 01:00:00.000000000 +0100
-+++ target/i386/nvmm-all.c	2019-02-13 15:57:30.270110128 +0100
-@@ -0,0 +1,1173 @@
++++ target/i386/nvmm-all.c	2019-02-20 14:36:50.696148104 +0100
+@@ -0,0 +1,1175 @@
 +/*
 + * Copyright (c) 2018-2019 Maxime Villard, All rights reserved.
 + *
@@ -513,6 +513,7 @@ Add NVMM support.
 +    state.crs[NVMM_X64_CR_CR3] = (uint64_t)env->cr[3];
 +    state.crs[NVMM_X64_CR_CR4] = (uint64_t)env->cr[4];
 +    state.crs[NVMM_X64_CR_CR8] = (uint64_t)vcpu->tpr;
++    state.crs[NVMM_X64_CR_XCR0] = (uint64_t)env->xcr0;
 +
 +    /* Debug registers. */
 +    state.drs[NVMM_X64_DR_DR1] = (uint64_t)env->dr[1];
@@ -663,6 +664,7 @@ Add NVMM support.
 +        vcpu->tpr = tpr;
 +        cpu_set_apic_tpr(x86_cpu->apic_state, tpr);
 +    }
++    env->xcr0 = state.crs[NVMM_X64_CR_XCR0];
 +
 +    /* Debug registers. */
 +    env->dr[1] = state.drs[NVMM_X64_DR_DR1];