Re: kern/60144: virtio(4) cache coherence issue

[Jason Thorpe <thorpej%me.com@localhost>]

> On Mar 30, 2026, at 9:41 AM, Robert Elz <kre%munnari.OZ.AU@localhost> wrote:
> 
> So, I'm not sure that the general concept is quite as absurd as it seems
> at first glance - it might help locate all kinds of caching issues such
> as the one Taylor described.

While what you say is true, it’s important to remember that one of the design goals of VirtIO was to break through performance bottlenecks associated with emulating actual hardware devices (which includes all of the cache interaction).

I’m not saying that this use if VirtIO couldn’t be useful.. but it’s also worth considering that the issues in this case may not lie with the bus_dma back-end but rather with the VirtIO code in the kernel itself (based on my preliminary conversion with Taylor about the problem).  It’s been demonstrated by years of “working at all” that the m68k bus_dma back-end does in fact work (the virt68k copy was lifted straight from mvme68k and is one of my next targets for de-duplication).

Do we really want to add cache management overhead to the VirtIO layer for the benefit of a system emulator when VirtIO itself as a system was designed to be inherently coherent?  One could argue that any system emulator which includes VirtIO has to accept the “caches are fully coherent with main memory” model that seems to be implied by VirtIO’s nature.

-- thorpej