NetBSD-Bugs archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Re: kern/60144: virtio(4) cache coherence issue
> On Mar 29, 2026, at 7:55 PM, isaki%pastel-flower.jp@localhost via gnats <gnats-admin%netbsd.org@localhost> wrote:
>
> And the following four results I observed also support this assumption.
> - qemu (68040, without cache impl.) could not reproduce.
> - nono (68030, with cache impl.) could reproduce.
> - nono (68040, without cache impl. yet) could not reproduce.
> - nono (68030, force disable data cache) could not reproduce.
This actually brings up an interesting philosophical question: What does DMA coherency mean in the context of virtio?
If you think about whence virtio originated: virtualized devices, the same machine, a guest <-> hypervisor communication channel. It’s all the same machine, it’s all the same memory. If you think about it, it’s inherently coherent, and modeling the cache effects of a device doesn’t really seem aligned with what virtio **fundamentally is**.
Does that make sense?
-- thorpej
Home |
Main Index |
Thread Index |
Old Index