NetBSD-Bugs archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

Re: port-sgimips/38932: sgimips bus_dmamap_sync() is incorrect

>       bus_dmamap_sync(POSTREAD) should do a cache invalidation.
>       bus_dmamap_sync(PREREAD) should probably be turned to a NOP

No, it won't work if specified region isn't cacheline aligned.

We can't invalidate cache if specified region is not cacheline aligned
(otherwise some necessary data in the same cacheline could be lost) and
we have to use writeback and invalidate in that case, but
such writeback should be done _before_ starting DMA otherwise
transfered data via DMA will be lost by writeback.
That's the reason why all POSTWRITE and POSTREAD are no-op.

Drivers should call PREREAD after each polling instead.
(see sys/dev/ic/rtl8169.c:re_rxeof() etc.)
Izumi Tsutsui

Home | Main Index | Thread Index | Old Index