Subject: Re: Possible bug in arm32 strongarm optimisations.
To: Chris Gilbert <chris@buzzbee.freeserve.co.uk>
From: Richard Earnshaw <rearnsha@arm.com>
List: tech-toolchain
Date: 10/30/2000 11:32:48
> Hi,
>
> I've been trying to build an arm32 kernel with the -mcpu=strongarm
> -mtune=strongarm.
>
> The problem I've had is that the podulebus doesn't get devices attaching
> properly. Anyway, after doing some rummaging around in the .s files from a
> kernel with and without the above options it seems that it's doing the
> following optimsation:
> turning:
> ldr r3, [r5, #6]
> mov r0, r3, lsr #16
> into
> ldrh r0, [r5, #4]
>
> This occurs at about line 289/290 of sys/arch/arm32/podulebus/podulebus.c
> I believe it should actually produce:
> ldrh r0, [r5, #8]
>
> (note it's late and I'm tired so I may well be wrong)
>
> If someone else could confirm this, I'll raise a PR tommorrow (unless someone
> else wants to). My concern is that cats and shark kernels default to using
> the above options which might be wrong, should this option be removed from
> 1.5 kernels?
>
> (nice to actually be able to look at asm and actually understand it easily
> once more, been far too long since I last saw ARM asm :)
>
> Cheers,
> Chris
This is for an Acorn based machine, right?
If so, then the problem you are seeing is that the Acorn buses, don't
support the ldrh instruction (they were designed before that instruction
was added to the cpu artchitecture).
The solution is to use -mcpu=arm7m -mtune=strongarm.
On CATS and SHARKS, the optimization is safe, since the buses on these
machines can handle half-word operations.
Richard.