On Wed, 25 Oct 2000, Reinoud Zandijk wrote:
> Hi Chris,
>
> On Wed, 25 Oct 2000, Chris Gilbert wrote:
> > I've been trying to build an arm32 kernel with the -mcpu=strongarm
> > -mtune=strongarm.
>
> Oh ok
>
> > The problem I've had is that the podulebus doesn't get devices attaching
> > properly. Anyway, after doing some rummaging around in the .s files from
> > a kernel with and without the above options it seems that it's doing the
> > following optimsation:
> > turning:
> > ldr r3, [r5, #6]
> > mov r0, r3, lsr #16
> > into
> > ldrh r0, [r5, #4]
> >
> > This occurs at about line 289/290 of sys/arch/arm32/podulebus/podulebus.c
> > I believe it should actually produce:
> > ldrh r0, [r5, #8]
>
> Well i chalenge that :)
>
> Lets say the memory is represented as follows from r5 :
>
>     7 6 5 4 | 3 2 1 0
>
> ldr r3, [r5, #6]
>    r3 <- [5476]    // (in)famous rotating
> mov r0, r3, lsr # 16
>    r0 <- [--54]    // with the `-' zero

What is this rotating thing?  I don't remember coming across it before.  Is 
it documented anywhere?

> The optimalisation implemented is :
> ldrh r0, [r5, #4]
>    r0 <- [--54]    // the same

doh, helps if I'd actually looked at the structure, the value should be at +4 
into the struct...

perhaps a commented line in the RISCPC config file, saying use these flags 
for a SA on a RiscPC, as RPC doesn't support halfword load and stores...

Cheers,
Chris