> 	PowerPC does not require that floating point data be
> word-aligned.  One can specify addresses to the individual byte.  FP loads
> and stores that are not naturally aligned will be slower, but do
> work.

Nope. From "The PowerPC Architecture", Book III, page 464:

  5.5.6 Alignment Interrupt

  An Alignment interrupt occurs when no higher priority exception
  exists and the implementation cannot perform a storage access for
  one of the reasons listed below.

  * The operand of a floating-point load or store is not word-aligned.

  * ...


Furthermore, I've seen it happen. Here's the sample program from the
PR:

  int main(int argc, char **argv)
  {
    struct foo { short a, b, c, d; } one;
    struct bar { short e; struct foo f; } two;

    two.f = one;
  }

And it generates something like "lfd 0, 16(31); stfd 0, 26(31)" (I
don't have a ppc or cross-compiler handy right now to get the exact
code), and I get an alignment interrupt when it executes the stfd. If
I build with -mstrict-align, it does the structure copy with two
integer loads and two integer stores instead, and it works.

> 	If you are receiving alignment exceptions, why don't you implement
> an alignment exception handler for NetBSD/powerpc?

I did, actually, and will probably commit it after I clean it up some
more, but I figure that since the alpha and sparc machine descriptions
set "STRICT_ALIGNMENT" to avoid alignment exceptions, then the powerpc
description should try to avoid them too. (Plus, if every Gtk app has
to take multiple alignment interrupts every time it gets an event,
that's going to slow things down.)

-- Dan