> [The pairing requirement is] always required, at least potentialy,
> the way mips symbol-refs (eg, "la $2, <external_symbol>" work now,
> because the low-order offset is signed.  if it [weree] unsigned, then
> the load of the upper and lower 16 bits would be disjoint (ordered,
> but disjoint -- no carries) and this particular problem would go
> away. (is that what you meant to suggest?)

Okay, I don't understand.  I've been following this and trying to
figure out what the problem is, and I finally have to give up.  Could
someone explain?

> 	    lui	  $1,   %hi (expr1)		# ..carry compensation  needed
> 	    addiu  $1,   %lo(expr1)		# NB: %lo is sign extended

I can't see why the loader has to be able to pair up these
instructions.

It is entirely possible to take a 32-bit value V and compute two values
A and B such that
	- A & 0x0000ffff is zero
	- B & 0xffff0000 is zero
	- A + sign-extend(B) = V
I trust nobody disagrees with this.  (Let B = V & 0xffff; then let A =
V - sign-extend(B).  Simple enough.)

Now, tell me, why can't the HI16 reloc take the expression value, do
this computation, and jam the A value into the instruction, and %lo
likewise but use the B value, each without having to care the slightest
bit about the other?  This is what's baffling me, and I conclude there
must be some subtlety here of which I am ignorant.  Certainly the SPARC
has no such problems, and there too the low part is signed (though the
split is 22/10, not 16/16).

					der Mouse

			       mouse@rodents.montreal.qc.ca
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