Subject: Re: Host compile rules in
To: Andrew Cagney <cagney@tpgi.com.au>
From: Bill Studenmund <skippy@macro.stanford.edu>
List: tech-toolchain
Date: 04/20/1998 21:50:14
On Thu, 16 Apr 1998, Todd Vierling wrote:

> On Fri, 17 Apr 1998, Andrew Cagney wrote:
> 
> : Just a more general question,  why are people trying to perform a
> : complex multi-stage build using a single build tree?
> 
> We aren't.  It's the confusion between target object files and host object
> files, and the need for a compile rule other than .c.o that uses
> ${HOST_COMPILE.c}, that prompts the different extension.  The latter reason
> is what started this whole thread--we have no "standard" Makefile rule to
> compile host-based programs.

To elaborate a little: there are some programs in the tree which compile
and run programs during the course of program compilation. gcc uses such
programs for making some of the bits in libcc1 (an internal library in the
gcc tree). tn3270, sh, and others do the same.

We'd like to do these compilations with CC=cross-compiling-gcc, etc.
Obviously that won't work for stuff to run on the host. Thus this thread.

We already have part of your obj subdirectory idea. Building the tree with
OBJMACHINE set to 1 will make all of the compilation happen in
obj.MACHINE. But it'd be cool to also set targets too. That way we could
build cross compilers in-tree. :-)

But the latter point's digressing. Even w/ obj directories we need to tell
host from non-host obj's apart as they'll end up in the same directory
when they're involved in cross compiling the same program.

Take care,

Bill