Subject: Re: Dell PowerEdge 8450
To: Martin Husemann <firstname.lastname@example.org>
From: Mark Simmons <email@example.com>
Date: 03/02/2004 10:38:03
Martin Husemann wrote:
> On Mon, Mar 01, 2004 at 01:20:27PM +0000, Mark Simmons wrote:
>>Well, reading the paper on the new FreeBSD 5.0 ULE (sp?) scheduler, it
>>seems as though they're treating HT CPUs as a form of NUMA for CPU affinity
> It's been a while, and maybe my memory is at fault here, but I seem to recall
> the paper only scatching HT on the surface. IIUC the main trick was to
> have HT (virtual) CPUs share the same per-physical-cpu run queue.
Essentially yes, they didn't go into any depth beyond that. Certainly would be
interesting to see some more on that as more CPUs get multiple thread and
multiple core features.
> This looked like an amazingly simple trick, but I do not pretend to
> understand the implications fully (nor know anything about modern Intel
> CPUs or HT). How does lazy FPU saving work in such a sheme?
I was surprised that they'd any insfrastructure in there for NUMA tbh, given
processor affinity itself is a fairly recent item, though maybe I'm losing track
of who's done what, when.