Subject: Success!
To: None <tech-smp@netbsd.org>
From: Christos Zoulas <christos@zoulas.com>
List: tech-smp
Date: 11/29/2001 01:05:06
Finally I've been able to complete a full make build on my dual athlon board
under current, thanks to the suggestions from fvdl (turn interrupt
configuration on the bios) and from martin (turn on LOCKDEBUG). A current
kernel as of today will compile and build userland. You need to bring
mca/mca_machdep.c and include/mca_machdep.c to head and apply the following
patch. Following is the dmesg and the patch.

christos

NetBSD 1.5Y (GENERIC.MP) #0: Wed Nov 28 15:11:18 EST 2001
    christos@dunno:/home/NetBSD/cvsroot/src/sys/arch/i386/compile/GENERIC.MP
total memory = 1023 MB
avail memory = 932 MB
using 11424 buffers containing 52508 KB of memory
BIOS32 rev. 0 found at 0xfd6a0
mainbus0 (root)
mainbus0: Intel MP Specification (Version 1.4) (TYAN     GUINNESS    )
cpu0 at mainbus0: apid 1 (boot processor)
cpu0: AMD K7 (Athlon) (686-class), 1194.74 MHz
cpu0: features 383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features 383fbff<PGE,MCA,CMOV,FGPAT,PSE36,MMX,FXSR,SSE>
cpu0: I-cache 64 KB 64b/line 2-way, D-cache 64 KB 64b/line 2-way
cpu0: L2 cache 256 KB 64b/line 16-way
cpu0: ITLB 16 4 KB entries fully associative, 8 4 MB entries fully associative
cpu0: DTLB 32 4 KB entries fully associative, 8 4 MB entries 4-way
cpu0: calibrating local timer
cpu0: apic clock running at 265 MHz
cpu0: 8 page colors
cpu1 at mainbus0: apid 0 (application processor)
cpu1: starting
cpu1: AMD K7 (Athlon) (686-class), 1194.68 MHz
cpu1: features 383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu1: features 383fbff<PGE,MCA,CMOV,FGPAT,PSE36,MMX,FXSR,SSE>
cpu1: I-cache 64 KB 64b/line 2-way, D-cache 64 KB 64b/line 2-way
cpu1: L2 cache 256 KB 64b/line 16-way
cpu1: ITLB 16 4 KB entries fully associative, 8 4 MB entries fully associative
cpu1: DTLB 32 4 KB entries fully associative, 8 4 MB entries 4-way
mpbios: bus 0 is type PCI   
mpbios: bus 1 is type PCI   
mpbios: bus 2 is type ISA   
ioapic0 at mainbus0 apid 2 (I/O APIC)
ioapic0: pa 0xfec00000, version 11, 24 pins
pci0 at mainbus0 bus 0: configuration mode 1
pci0: i/o space, memory space enabled
pchb0 at pci0 dev 0 function 0
pchb0: Advanced Micro Devices AMD762 NorthBridge (rev. 0x11)
agp at pchb0 not configured
ppb0 at pci0 dev 1 function 0: Advanced Micro Devices AMD762 AGP Bridge (rev. 0x00)
pci1 at ppb0 bus 1
pci1: i/o space, memory space enabled
pcib0 at pci0 dev 7 function 0
pcib0: Advanced Micro Devices AMD766 SouthBridge (rev. 0x02)
pciide0 at pci0 dev 7 function 1: Advanced Micro Devices AMD766 IDE Controller (rev. 0x01)
pciide0: bus-master DMA support present
pciide0: primary channel configured to compatibility mode
atapibus0 at pciide0 channel 0: 2 targets
cd0 at atapibus0 drive 0: <CD-224E, , 1.7A> type 5 cdrom removable
cd0: 32-bit data port
cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
pciide0: primary channel interrupting at irq 14
cd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA data transfers)
pciide0: secondary channel configured to compatibility mode
pciide0: disabling secondary channel (no drives)
Advanced Micro Devices AMD766 Power Management Controller (miscellaneous bridge, revision 0x01) at pci0 dev 7 function 3 not configured
ohci0 at pci0 dev 7 function 4: Advanced Micro Devices AMD766 USB Host Controller (rev. 0x07)
ohci0: interrupting at apic 2 int 19 (irq 11)
ohci0: OHCI version 1.0, legacy support
usb0 at ohci0: USB revision 1.0
uhub0 at usb0
uhub0: Advanced Micro OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 4 ports with 4 removable, self powered
ahc1 at pci0 dev 13 function 0
ahc1: interrupting at apic 2 int 16 (irq 10)
ahc1: aic7899 Wide Channel A, SCSI Id=7, 16/255 SCBs
scsibus0 at ahc1: 16 targets, 8 luns per target
ahc2 at pci0 dev 13 function 1
ahc2: interrupting at apic 2 int 17 (irq 5)
ahc2: aic7899 Wide Channel B, SCSI Id=7, 16/255 SCBs
scsibus1 at ahc2: 16 targets, 8 luns per target
vga1 at pci0 dev 14 function 0: ATI Technologies product 0x4752 (rev. 0x27)
wsdisplay0 at vga1 kbdmux -1: console (80x25, vt100 emulation)
ex0 at pci0 dev 15 function 0: 3Com 3c980C-TXM 10/100 Ethernet (rev. 0x78)
ex0: interrupting at apic 2 int 18 (irq 3)
ex0: MAC address 00:e0:81:03:94:69
ex0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, default 10baseT
ex1 at pci0 dev 16 function 0: 3Com 3c980C-TXM 10/100 Ethernet (rev. 0x78)
ex1: interrupting at apic 2 int 19 (irq 11)
ex1: MAC address 00:e0:81:03:94:6a
ex1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, default 10baseT
isa0 at pcib0
com0 at isa0 port 0x3f8-0x3ff irq 4: ns16550a, working fifo
pckbc0 at isa0 port 0x60-0x64
pckbd0 at pckbc0 (kbd slot)
pckbc0: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard, using wsdisplay0
pmsi0 at pckbc0 (aux slot)
pckbc0: using irq 12 for aux slot
wsmouse0 at pmsi0 mux 0
lpt0 at isa0 port 0x378-0x37b irq 7
pcppi0 at isa0 port 0x61
midi0 at pcppi0: PC speaker
sysbeep0 at pcppi0
isapnp0 at isa0 port 0x279: ISA Plug 'n Play device support
npx0 at isa0 port 0xf0-0xff: using exception 16
fdc0 at isa0 port 0x3f0-0x3f7 irq 6 drq 2
isapnp0: no ISA Plug 'n Play devices found
biomask 0 netmask 0 ttymask 0
ioapic0: enabling
ioapic0: WARNING: sharing interrupt between different IPLs (currently broken)
ioapic0: pin 19, ipls 70..80
scsibus0: waiting 2 seconds for devices to settle...
sd0 at scsibus0 target 0 lun 0: <HITACHI, DK32CJ-18MC, JBBB> SCSI3 0/direct fixed
sd0: 17628 MB, 15314 cyl, 6 head, 392 sec, 512 bytes/sect x 36102720 sectors
sd0: sync (25.0ns offset 127), 16-bit (80.000MB/s) transfers, tagged queueing
sd1 at scsibus0 target 1 lun 0: <HITACHI, DK32CJ-18MC, JBBB> SCSI3 0/direct fixed
sd1: 17628 MB, 15314 cyl, 6 head, 392 sec, 512 bytes/sect x 36102720 sectors
sd1: sync (25.0ns offset 127), 16-bit (80.000MB/s) transfers, tagged queueing
ses0 at scsibus0 target 9 lun 0: <QLogic, GEM359, 1.07> SCSI2 3/processor fixed
ses0: SAF-TE Compliant Device
ses0: async, 8-bit transfers
scsibus1: waiting 2 seconds for devices to settle...
sd1: no disk label
boot device: sd0
root on sd0a dumps on sd0b
root file system type: ffs
cpu1: CPU 0 running
wsdisplay0: screen 1 added (80x25, vt100 emulation)
wsdisplay0: screen 2 added (80x25, vt100 emulation)
wsdisplay0: screen 3 added (80x25, vt100 emulation)
wsdisplay0: screen 4 added (80x25, vt100 emulation)
wsmux1: connecting to wsdisplay0
? o
Index: Makefile
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/i386/include/Makefile,v
retrieving revision 1.19
diff -u -u -r1.19 Makefile
--- Makefile	2001/09/12 04:44:21	1.19
+++ Makefile	2001/11/29 00:52:44
@@ -3,7 +3,7 @@
 KDIR=	/sys/arch/i386/include
 INCSDIR= /usr/include/i386
 
-INCS=	ansi.h aout_machdep.h apmvar.h asm.h \
+INCS=	ansi.h aout_machdep.h apmvar.h asm.h atomic.h \
 	bioscall.h bootinfo.h bswap.h byte_swap.h bus.h \
 	cdefs.h conf.h cpu.h cpufunc.h cputypes.h \
 	db_machdep.h disklabel.h \
Index: atomic.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/i386/include/Attic/atomic.h,v
retrieving revision 1.1.2.4
diff -u -u -r1.1.2.4 atomic.h
--- atomic.h	2000/12/31 00:32:51	1.1.2.4
+++ atomic.h	2001/11/29 00:52:45
@@ -43,14 +43,14 @@
 
 #ifndef _LOCORE
 
-static __inline u_int32_t
+static __inline unsigned long
 i386_atomic_testset_ul (volatile u_int32_t *ptr, unsigned long val) {
     __asm__ volatile ("xchgl %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));
     return val;
 }
 
 static __inline int
-i386_atomic_testset_i (volatile int *ptr, unsigned long val) {
+i386_atomic_testset_i (volatile int *ptr, int val) {
     __asm__ volatile ("xchgl %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));
     return val;
 }
@@ -67,4 +67,3 @@
 
 #endif
 #endif
-