On Tue, Jul 29, 2003 at 04:00:24PM +1000, Jason Hecker wrote:
> Seeing as certain embedded archetectures have speedy general purpose DMA 
> devices, would there be any reason to not use said DMA device to speed up 
> the memcpy() routine?  I can only think of contention issues with multiple 
> processes trying to use the same DMA at the same time.  Perhaps some sort 
> of transparent queueing mechanism might be in order to deal with multiple 
> simultaneous memcpy requests.

I very much doubt you would get any improvement, in fact it would
be hard to not lose out badly.

You would have to loop waiting for the DMA to finish - because the
cost of the ISR to restart things is likely to be significant, never
mind the cost of any process switches.

You then have problems with cache coherency to consider.

Low level cache controller operations can sometimes be used to do
copies a cache line at a time.

However, and tests as to which algorithm to use can slow things down
as a lot of the copies done are actually short.

Also note that the cpu could easily have a faster data path to memory
than the dma controller.

	David

-- 
David Laight: david@l8s.co.uk