Subject: Re: Hardware IPv4/TCP/UDP checksumming support
To: Andreas Persson <>
From: =?iso-8859-1?Q?P=E5l_Halvorsen?= <>
List: tech-net
Date: 09/07/2001 09:39:52
On Thu, 6 Sep 2001, Andreas Persson wrote:

> On Thu, Sep 06, 2001 at 01:48:46PM +0200, P=E5l Halvorsen <>=
> >On Thu, 6 Sep 2001, Ignatios Souvatzis wrote:
> >
> >> On Thu, Sep 06, 2001 at 01:17:57PM +0200, P=E5l Halvorsen wrote:
> >> >=20
> >> > If we assume using NIC DMA to access main memory and using UDP/IP
> >> > calculating UDP checksum, filling the IP header and caclulating IP h=
> >> > checksum.
> >> >=20
> >> > Does this mean that the checksum offload requires more bus transfers=
> >> > native checksum mechanisms only transfering the original packet once=
> >> > (data and UDP header twice, and IP header three times - including th=
> >> > UDPIP pseudo header used during UDP checksum)=20
> >> > Or is the data transfered to the NIC during UDP checksum and only th=
> >> > headers are transfered several times?
> It seems like it would transfer it some onboard memory, otherwise it can =
> starved for bus accesses. With gigabit ethernet, its crucial to have
> packets ready to send all the time in order to get decent performance.
> Also note that you can essentially get the checksum for free when copying
> the data into kernel space. Linux does this last I checked. Hopefully
> we'll get zero copy tcp instead.

I'm not copying data from user space. I have a multimedia server using a
zero-copy data path from disk to network where the data is not touched in
user space and therefore not accessible from a user prosess....

If it is transferred to the on-board memory during checksum (which is
delayed until IP processing), does this
mean that the packets in the "if_queue" (IF_ENQUEUE,...) is located on
the onboard memory and from there trasferred to the transmitt ring??

If the data is transfered to the board memory during IP, I guess that
data and headers will have non-contiguous locations in the NIC board
memory also...?

But the ti "if_queue" may have 511 packets queued. Then the real maximum
number will be limited by the amount of memory on-board assuming jumbo
packet MTUs of max ~9KB (for example the 3c985b-sx have 1 MB memory)

Would it be hard to put all the communication protocoll processing
on-board the NIC?

> Andreas Persson

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