>>>>> "Manuel" == Manuel Bouyer <bouyer@antioche.lip6.fr> writes:
    Manuel> On Tue, Jan 23, 2001 at 07:38:49AM -0500, Michael Richardson wrote:
    >> Yes, but the host bridges typically interconnect over the Pentium III bus
    >> (or other processor bus), and the current host bridges seem to break 64bit
    >> transactions into 32-bit transactions once they cross the host bus.

    Manuel> Hum, I was thinking about alpha hardware here :)
    Manuel> I'm not sure in a PC the CPU has the memory bandwidth needed either.

  Ah! Alpha... of course. How do its PCI buses interface?

  I'm assuming that the packet never hits the main memory, actually :-)

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