Re: viapcib and viaenv drivers

[Andrius V <vezhlys%gmail.com@localhost>]

On Sat, Jul 19, 2025 at 10:48 AM matthew green <mrg%eterna23.net@localhost> wrote:
>
> > How to write driver(s) for the device which:
> > 1) has multipurpose registers to control different devices.
> > 2) can connect to pci or pcib.
> > 3) some controlled devices overlap and are backwards compatible between
> > chipsets (smbus, iic, power management, gpio, etc)
> > 4) some can have chipset specific devices to control (like hw monitor
> > on VT8231)
> > 5) newer chipsets may have more devices to control than older.
> > 6) some controls may need to be exposed over sysctl.
>
> maybe have a look at how x86 cpufeaturebus works.
>
>
> .mrg.

Hi again,

I would like to present my first iteration of the implementation for review:
https://github.com/vezhlys/netbsd-src/pull/2/files

It is not fully ready for commit yet (at least man pages still need to
be updated),
but the main changes are implemented, following the cpufeaturebus and other
pcib driver examples as suggested.

I believe all these drivers are missing detach() logic, I avoided
doing it for now to keep the initial review smaller.

As a reminder, my goal is to introduce SMBus support for both newer VIA
southbridges/MSPs attached through viapcib (ISA bus) and for older ones
attached through PCI (viaenv(4)). The viaenv(4) power management (PM)
timer should
also be able to attach to viapcib on newer chipsets. This is because recent
VIA chips combine the ISA-PCI bridge function with other southbridge
functions, such as ACPI PM, GPIO, and SMBus.

In short, the work done so far:
SMBus code was separated into a new viasmb driver, moved out of viapcib.
A new viadevbus was introduced to attach viasmb and viaenv to viapcib, and
viasmb to viaenv.
viapcib was updated to scan viadevbus for viasmb and viaenv, and new
identification PCI IDs were added.
viapcib was moved from sys/arch/i386/pci to sys/arch/x86/pci and included
in the amd64 kernel config to support 64-bit VIA systems.

viaenv was changed to attach to viapcib via viadevbus on newer devices.
viaenv was modified to attach viasmb (via viadevbus) when attached to PCI.
viaenv was extended to support newer southbridges/MSPs with different I/O
base address. The HW monitor part is supported by VT82C686/VT8231 only,
thus code was modified to handle that.
VT82C596B identification was added (it includes an SMBus).

viaenv is disabled by default on newer systems, since it currently
provides no practical value (PM counter is attached through ACPI).
I would like to enable it for VT686 and VT8231 on PCI, though I am not sure
why it was originally disabled.

The resulting configuration is:
viapcib at pci -> viasmb, viaenv at viapcib (via viadevbus)
viaenv at pci -> viasmb at viaenv (over viadevbus)

In the future, I would like to make viasmb, viaenv, and other potential
drivers (e.g. GPIO) loadable as modules.

I have a few questions:
Should I introduce detach logic (I believe yes)?
Should viasmb be placed in sys/dev/pci or sys/dev/ic?
Should I split viaenv to sys/dev/ic/viaenv.c and
sys/dev/pic/viaenv_pci.c, separating PCI specific attachment logic
from viadevbus one?
Is it possible to detect whether the PM counter is already attached
via ACPI and skip attaching it in viaenv?

PM counter was the most headache for me due to the the fact it is
currently attached over ACPI,
I even considered removing it entirely, but viaenv is used on ofppc,
where the counter is attached,
while the hardware monitor part appears to be disabled ((found this
dmesg: https://dmesgd.nycbug.org/dmesgd?do=view&id=3428).
However, I may expand this place in the future, for example to expose
some values over sysctl making it more useful. I haven't decided yet.

Tested this patch on few devices:
VIA VT8231 (VIA EPIA VE5000) for viaenv
VT8237, VT8237S, VT8251, VT8261, VX800, VX900 (various motherboards)
for viapcib.
Both amd64 and i386 where applicable (64-bit CPU is available).

All successfully attach viasmb, iic, spdmem, show memory data in dmesg.
All successfully attach viaenv and timecounter.

dmesg looks something like that for newer devices (viaenv and spdmem
enabled in kernel):
viapcib0 at pci0 dev 17 function 0: VIA Technologies VT8251 PCI-LPC
Bridge (rev. 0x00)
viaenv0 at viapcib0: VIA Technologies timecounter: Timecounter
"viaenv0" frequency 3579545 Hz quality 1000
viaenv0: 24-bit timer
viasmb0 at viapcib0
viasmb0: SMBus found at 0x500 (revision 0x0)
iic0 at viasmb0: I2C bus
spdmem0 at iic0 addr 0x50
spdmem0: DDR2 SDRAM, no parity or ECC, 1GB, 800MHz (PC2-6400)
spdmem0: 14 rows, 10 cols, 2 ranks, 4 banks/chip, 2.50ns cycle time
spdmem0: tAA-tRCD-tRP-tRAS: 5-5-5-18
spdmem0: voltage SSTL 1.8V, refresh time 7.8us (self-refreshing)

for older:
viaenv0 at pci0 dev 17 function 4: VIA Technologies VT8231 Hardware Monitor
timecounter: Timecounter "viaenv0" frequency 3579545 Hz quality 1000
viaenv0: 24-bit timer
viasmb0 at viaenv0
viasmb0: SMBus found at 0x5000 (revision 0x0)
iic0 at viasmb0: I2C bus
spdmem0 at iic0 addr 0x50
spdmem0: SDRAM, no parity or ECC, 128MB, 133MHz (PC-133)
spdmem0: 13 rows, 9 cols, 1 banks, 4 banks/chip, 7.5ns cycle time
spdmem0: tAA-tRCD-tRP-tRAS: 3-20-20-45
spdmem0: voltage LvTTL (not 5V tolerant), refresh time 7.8us (self-refreshing)

Thank you!

Regards,
Andrius V