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Re: eMMC module not working
I tried a brute force change (replacing the SDMMC_LOCK/UNLOCK macros)
and this seems to get rid of some strange timings, but not solve the
problem.
Martin
[ 1.0000000] Found CTF at 0xffffc00000d04ad0, size 0x88a3d
[ 1.0000000] Loaded initial symtab at 0xffffc00000d8d510, strtab at 0xffffc00000e72968, # entries 39129
[ 1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
[ 1.0000000] 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017,
[ 1.0000000] 2018, 2019, 2020 The NetBSD Foundation, Inc. All rights reserved.
[ 1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993
[ 1.0000000] The Regents of the University of California. All rights reserved.
[ 1.0000000] NetBSD 9.99.69 (GENERIC64) #152: Fri Jul 17 14:16:23 CEST 2020
[ 1.0000000] martin%seven-days-to-the-wolves.aprisoft.de@localhost:/work/src/sys/arch/evbarm/compile/GENERIC64
[ 1.0000000] total memory = 2012 MB
[ 1.0000000] avail memory = 1951 MB
[ 1.0000000] pool redzone disabled for 'buf4k'
[ 1.0000000] pool redzone disabled for 'buf64k'
[ 1.0000000] entropy: no seed from bootloader
[ 1.0000000] armfdt0 (root)
[ 1.0000000] simplebus0 at armfdt0: Hardkernel ODROID-C2
[ 1.0000000] simplebus1 at simplebus0
[ 1.0000000] cpus0 at simplebus0
[ 1.0000000] simplebus2 at simplebus0
[ 1.0000000] psci0 at simplebus0: PSCI 0.2
[ 1.0000000] cpu0 at cpus0: Arm Cortex-A53 r0p4 (v8-A), id 0x0
[ 1.0000000] cpu1 at cpus0: Arm Cortex-A53 r0p4 (v8-A), id 0x1
[ 1.0000000] cpu2 at cpus0: Arm Cortex-A53 r0p4 (v8-A), id 0x2
[ 1.0000000] cpu3 at cpus0: Arm Cortex-A53 r0p4 (v8-A), id 0x3
[ 1.0000000] simplebus3 at simplebus1
[ 1.0000000] simplebus4 at simplebus1
[ 1.0000000] simplebus5 at simplebus1
[ 1.0000000] simplebus6 at simplebus1
[ 1.0000000] simplebus7 at simplebus1
[ 1.0000000] simplebus8 at simplebus1
[ 1.0000000] gic0 at simplebus1: GIC
[ 1.0000000] armgic0 at gic0: Generic Interrupt Controller, 256 sources (238 valid)
[ 1.0000000] armgic0: 16 Priorities, 224 SPIs, 6 PPIs, 8 SGIs
[ 1.0000000] syscon0 at simplebus3: System Controller Registers
[ 1.0000000] syscon1 at simplebus4: System Controller Registers
[ 1.0000000] fclock0 at simplebus0: 24000000 Hz fixed clock (xtal)
[ 1.0000000] syscon2 at simplebus3: System Controller Registers
[ 1.0000000] gtmr0 at simplebus0: Generic Timer
[ 1.0000000] gtmr0: interrupting on GIC irq 27
[ 1.0000000] armgtmr0 at gtmr0: Generic Timer (24000 kHz, virtual)
[ 1.0000030] gxbbclkc0 at syscon1: Meson GXBB clock controller
[ 1.0000030] mesonpinctrl0 at simplebus5: Meson GXBB periphs GPIO
[ 1.0000030] gpio0 at mesonpinctrl0: 119 pins
[ 1.0000030] mesonresets0 at simplebus6
[ 1.0000030] gxbbaoclkc0 at syscon0: Meson GX AO clock controller
[ 1.0000030] mesonpinctrl1 at simplebus3: Meson GXBB AO GPIO
[ 1.0000030] mesonpinctrl1: usb-hub-reset GPIOAO_4 set to output (high)
[ 1.0000030] gpio1 at mesonpinctrl1: 14 pins
[ 1.0000030] fregulator0 at simplebus0: VCC1V8
[ 1.0000030] fregulator1 at simplebus0: TFLASH_VDD
[ 1.0000030] gregulator0 at simplebus0: TF_IO
[ 1.0000030] fregulator2 at simplebus0: VCC3V3
[ 1.0000030] fregulator3 at simplebus0: HDMI_P5V0
[ 1.0000030] fregulator4 at simplebus0: USB_OTG_PWR
[ 1.0000030] fregulator5 at simplebus0: P5V0
[ 1.0000030] fregulator6 at simplebus0: VDDIO_AO3V3
[ 1.0000030] mesonuart0 at simplebus3: console
[ 1.0000030] mesonuart0: interrupting on GIC irq 225
[ 1.0000030] fregulator7 at simplebus0: VDDIO_AO1V8
[ 1.0000030] fregulator8 at simplebus0: DDR3_1V5
[ 1.0000030] mmcpwrseq0 at simplebus0: eMMC hardware reset provider
[ 1.0000030] mesonusbphy0 at simplebus1: USB2 PHY (host)
[ 1.0000030] /soc/bus@c8100000/sys-ctrl@0/power-controller-vpu at syscon0 not configured
[ 1.0000030] /scpi at simplebus0 not configured
[ 1.0000030] /soc/bus@c883c000/mailbox@404 at simplebus4 not configured
[ 1.0000030] /soc/sram@c8000000 at simplebus1 not configured
[ 1.0000030] /soc/hdmi-tx@c883a000 at simplebus1 not configured
[ 1.0000030] /soc/bus@c8838000/video-lut@48 at simplebus7 not configured
[ 1.0000030] awge0 at simplebus1: Gigabit Ethernet Controller
[ 1.0000030] awge0: interrupting on GIC irq 40
[ 1.0000030] awge0: Core version: 00001137
[ 1.0000030] awge0: Ethernet address 00:1e:06:33:12:a6
[ 1.0000030] awge0: HW feature mask: 100d4f37
[ 1.0000030] rgephy0 at awge0 phy 0: RTL8211F 1000BASE-T media interface
[ 1.0000030] rgephy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
[ 1.0000030] rgephy1 at awge0 phy 7: RTL8211F 1000BASE-T media interface
[ 1.0000030] rgephy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
[ 1.0000030] /soc/bus@c1100000/interrupt-controller@9880 at simplebus6 not configured
[ 1.0000030] /soc/vpu@d0100000 at simplebus1 not configured
[ 1.0000030] dispcon0 at simplebus0: HDMI connector
[ 1.0000030] /efuse at simplebus0 not configured
[ 1.0000030] /soc/bus@c1100000/i2c@8500 at simplebus6 not configured
[ 1.0000030] /soc/bus@c1100000/adc@8680 at simplebus6 not configured
[ 1.0000030] /soc/bus@c8100000/cec@100 at simplebus3 not configured
[ 1.0000030] /soc/bus@c8100000/ir@580 at simplebus3 not configured
[ 1.0000030] /soc/video-codec@c8820000 at simplebus1 not configured
[ 1.0000030] mesonrng0 at simplebus5: Hardware RNG
[ 1.0000030] entropy: ready
[ 1.0000030] mesongxmmc0 at simplebus8: eMMC/SD/SDIO controller
[ 1.0000030] mesongxmmc0: interrupting on GIC irq 249
[ 1.0000030] mesongxmmc1 at simplebus8: eMMC/SD/SDIO controller
[ 1.0000030] mesongxmmc1: interrupting on GIC irq 250
[ 1.0000030] /soc/apb@d0000000/gpu@c0000 at simplebus8 not configured
[ 1.0000030] dwctwo0 at simplebus1: DesignWare USB2 OTG
[ 1.0000030] dwctwo0: interrupting on GIC irq 63
[ 1.0000030] armpmu0 at simplebus0: Performance Monitor Unit
[ 1.0000030] gpioleds0 at simplebus0: c2:blue:alive
[ 1.0000030] /soc/bus@c1100000/clock-measure@8758 at simplebus6 not configured
[ 1.0000030] /soc/bus@c1100000/watchdog@98d0 at simplebus6 not configured
[ 1.0000030] cpu0 has 1 core siblings: cpu0
[ 1.0000030] cpu0 has 4 pkg siblings: cpu1 cpu2 cpu3 cpu0
[ 1.0000030] cpu0 has 1 1st siblings: cpu0
[ 1.0000030] cpu0 first in package: cpu0
[ 1.0000030] cpu1 has 1 core siblings: cpu1
[ 1.0000030] cpu1 has 4 pkg siblings: cpu2 cpu3 cpu0 cpu1
[ 1.0000030] cpu1 has 1 1st siblings: cpu0
[ 1.0000030] cpu1 first in package: cpu0
[ 1.0000030] cpu2 has 1 core siblings: cpu2
[ 1.0000030] cpu2 has 4 pkg siblings: cpu3 cpu0 cpu1 cpu2
[ 1.0000030] cpu2 has 1 1st siblings: cpu0
[ 1.0000030] cpu2 first in package: cpu0
[ 1.0000030] cpu3 has 1 core siblings: cpu3
[ 1.0000030] cpu3 has 4 pkg siblings: cpu0 cpu1 cpu2 cpu3
[ 1.0000030] cpu3 has 1 1st siblings: cpu0
[ 1.0000030] cpu3 first in package: cpu0
[ 1.7601812] sdmmc0 at mesongxmmc0
[ 1.7601812] sdmmc1 at mesongxmmc1
[ 1.7601812] usb0 at dwctwo0: USB revision 2.0
[ 1.7601812] sdmmc1: attach card
[ 1.7718624] armpmu0: interrupting on GIC irq 169
[ 1.7718624] armpmu0: interrupting on GIC irq 170
[ 1.7801815] armpmu0: interrupting on GIC irq 185
[ 1.7801815] armpmu0: interrupting on GIC irq 186
[ 1.7901832] uhub0 at usb0: NetBSD (0x0000) DWC2 root hub (0x0000), class 9/0, rev 2.00/1.00, addr 1
[ 1.8101955] aes: ARM NEON vpaes
[ 1.8701857] sdmmc_mmc_command: cmd=52, arg=0x80000c08, flags=0x4032
[ 1.8701857] sdmmc1: cmd 52 arg=0x80000c08 data=0x0 dlen=0 flags=0x4032 (error 60)
[ 1.8701857] sdmmc_mmc_command: error=60
[ 1.8822158] sdmmc_mmc_command: cmd=5, arg=0, flags=0x4302
[ 1.8822158] sdmmc1: cmd 5 arg=0 data=0x0 dlen=0 flags=0x4302 (error 60)
[ 1.8942894] sdmmc_mmc_command: error=60
[ 1.8942894] sdmmc_go_idle_state
[ 1.8942894] sdmmc_mmc_command: cmd=0, arg=0, flags=0x600
[ 1.9066269] sdmmc1: cmd 0 arg=0 data=0x0 dlen=0 flags=0x601 (error 0)
[ 1.9066269] sdmmc1: resp=none
[ 1.9155525] sdmmc_mmc_command: error=0
[ 1.9155525] sdmmc1: sdmmc_mem_send_op_cond: ocr=0
[ 1.9155525] sdmmc_app_command: start
[ 1.9281519] sdmmc_mmc_command: cmd=55, arg=0, flags=0x4432
[ 1.9281519] sdmmc1: cmd 55 arg=0 data=0x0 dlen=0 flags=0x4432 (error 60)
[ 1.9404017] sdmmc_mmc_command: error=60
[ 1.9404017] sdmmc_app_command: done (error=60)
[ 1.9487143] sdmmc1: sdmmc_mem_send_op_cond: error=60, ocr=0
[ 1.9487143] sdmmc1: switch to MMC mode
[ 1.9487143] sdmmc1: sdmmc_mem_send_op_cond: ocr=0
[ 1.9628017] sdmmc_mmc_command: cmd=1, arg=0, flags=0x4702
[ 1.9687176] sdmmc1: cmd 1 arg=0 data=0x0 dlen=0 flags=0x4703 (error 0)
[ 1.9687176] sdmmc1: resp=80 80 ff 40
[ 1.9687176] sdmmc_mmc_command: error=0
[ 1.9822290] sdmmc1: sdmmc_mem_send_op_cond: error=0, ocr=0x40ff8080
[ 1.9822290] sdmmc1: host_ocr=300080 card_ocr=40ff8080 new_ocr=80
[ 1.9919394] sdmmc1: host_ocr 0x00300080
[ 1.9919394] sdmmc1: card_ocr 0x40ff8080
[ 2.0022644] sdmmc1: sdmmc_mem_send_op_cond: ocr=0x40300080
[ 2.0022644] sdmmc_mmc_command: cmd=1, arg=0x40300080, flags=0x4702
[ 2.0139892] sdmmc1: cmd 1 arg=0x40300080 data=0x0 dlen=0 flags=0x4703 (error 0)
[ 2.0139892] sdmmc1: resp=80 80 ff 40
[ 2.0237894] sdmmc_mmc_command: error=0
[ 2.0337886] sdmmc_mmc_command: cmd=1, arg=0x40300080, flags=0x4702
[ 2.0337886] sdmmc1: cmd 1 arg=0x40300080 data=0x0 dlen=0 flags=0x4703 (error 0)
[ 2.0337886] sdmmc1: resp=80 80 ff 40
[ 2.0447894] sdmmc_mmc_command: error=0
[ 2.0537890] sdmmc_mmc_command: cmd=1, arg=0x40300080, flags=0x4702
[ 2.0537890] sdmmc1: cmd 1 arg=0x40300080 data=0x0 dlen=0 flags=0x4703 (error 0)
[ 2.0537890] sdmmc1: resp=80 80 ff c0
[ 2.0657896] sdmmc_mmc_command: error=0
[ 2.0657896] sdmmc1: sdmmc_mem_send_op_cond: error=0, ocr=0xc0ff8080
[ 2.0770770] sdmmc_mmc_command: cmd=2, arg=0, flags=0x431a
[ 2.0770770] sdmmc1: cmd 2 arg=0 data=0x0 dlen=0 flags=0x431b (error 0)
[ 2.0890662] sdmmc1: resp=a3 60 47 64 0c 43 20 64 72 61 43 4e 03 01 88 00
[ 2.0890662] sdmmc_mmc_command: error=0
[ 2.0996519] sdmmc_dump_data: CID
[ 2.0996519] --------+--------------------------------------------------+------------------+
[ 2.1112893] offset | +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +a +b +c +d +e +f | data |
[ 2.1196892] --------+--------------------------------------------------+------------------+
[ 2.1196892] 00000000| a3 60 47 64 0c 43 20 64 72 61 43 4e 03 01 88 00 | .`Gd.C draCN.... |
[ 2.1302767] --------+--------------------------------------------------+------------------+
[ 2.1448892] sdmmc_mmc_command: cmd=3, arg=0x10000, flags=0x32
[ 2.1506646] sdmmc1: cmd 3 arg=0x10000 data=0x0 dlen=0 flags=0x33 (error 0)
[ 2.1506646] sdmmc1: resp=00 05 40 00
[ 2.1608143] sdmmc_mmc_command: error=0
[ 2.1608143] sdmmc_mmc_command: cmd=2, arg=0, flags=0x431a
[ 2.1706637] sdmmc1: cmd 2 arg=0 data=0x0 dlen=0 flags=0x431a (error 60)
[ 2.1706637] sdmmc_mmc_command: error=60
[ 2.1809394] sdmmc_mmc_command: cmd=9, arg=0x10000, flags=0x1a
[ 2.1809394] sdmmc1: cmd 9 arg=0x10000 data=0x0 dlen=0 flags=0x1b (error 0)
[ 2.1936288] sdmmc1: resp=00 40 96 e7 ff ff ff ff 03 59 0f 32 ff ff d0 00
[ 2.1936288] sdmmc_mmc_command: error=0
[ 2.2042142] sdmmc_dump_data: CSD
[ 2.2042142] --------+--------------------------------------------------+------------------+
[ 2.2158517] offset | +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +a +b +c +d +e +f | data |
[ 2.2242517] --------+--------------------------------------------------+------------------+
[ 2.2242517] 00000000| 00 40 96 e7 ff ff ff ff 03 59 0f 32 ff ff d0 00 | .@.......Y.2.... |
[ 2.2348393] --------+--------------------------------------------------+------------------+
[ 2.2494520] sdmmc1: CID: mid=0x88 oid=0x0103 pnm="NCard " rev=0x00 psn=0x0c644760 mdt=000
[ 2.2576768] sdmmc_mmc_command: cmd=7, arg=0x10000, flags=0x32
[ 2.2576768] sdmmc1: cmd 7 arg=0x10000 data=0x0 dlen=0 flags=0x33 (error 0)
[ 2.2703644] sdmmc1: resp=00 07 00 00
[ 2.2703644] sdmmc_mmc_command: error=0
[ 2.2778020] sdmmc_mmc_command: cmd=16, arg=0x200, flags=0x432
[ 2.2778020] sdmmc1: cmd 16 arg=0x200 data=0x0 dlen=0 flags=0x433 (error 0)
[ 2.2904893] sdmmc1: resp=00 09 00 00
[ 2.2904893] sdmmc_mmc_command: error=0
[ 2.2979287] sdmmc1: sdmmc_mem_set_blocklen: read_bl_len=512 sector_size=512
[ 2.2979287] sdmmc_mmc_command: cmd=8, arg=0, flags=0x572
[ 2.3102648] sdmmc1: cmd 8 arg=0 data=0xffff000004fb8000 dlen=512 flags=0x572 (error 5)
[ 2.3182270] sdmmc_mmc_command: error=5
[ 2.3182270] sdmmc1: can't read EXT_CSD (error=5)
[ 2.3182270] sdmmc1: mem init failed
[ 2.3301268] sdmmc1: init failed
[ 2.3301268] sdmmc1: detach card
[ 2.3301268] sdmmc_mmc_command: cmd=7, arg=0, flags=0
[ 2.3414142] sdmmc1: cmd 7 arg=0 data=0x0 dlen=0 flags=0x1 (error 0)
[ 2.3414142] sdmmc1: resp=none
[ 2.3501643] sdmmc_mmc_command: error=0
[ 3.6501887] uhub1 at uhub0 port 1: vendor 05e3 (0x05e3) USB2.0 Hub (0x0610), class 9/0, rev 2.00/32.98, addr 2
[ 3.6501887] uhub1: multiple transaction translators
[ 4.0001979] uhub0: illegal enable change, port 1
[ 4.0001979] WARNING: 4 errors while detecting hardware; check system log.
[ 4.0001979] boot device: <unknown>
[ 4.0101967] root device:
Index: sdmmc.c
===================================================================
RCS file: /cvsroot/src/sys/dev/sdmmc/sdmmc.c,v
retrieving revision 1.40
diff -u -p -r1.40 sdmmc.c
--- sdmmc.c 24 May 2020 17:26:18 -0000 1.40
+++ sdmmc.c 17 Jul 2020 12:41:27 -0000
@@ -71,8 +71,10 @@ __KERNEL_RCSID(0, "$NetBSD: sdmmc.c,v 1.
#include <dev/sdmmc/sdmmcreg.h>
#include <dev/sdmmc/sdmmcvar.h>
+#define SDMMC_DEBUG
+
#ifdef SDMMC_DEBUG
-int sdmmcdebug = 0;
+int sdmmcdebug = 5;
static void sdmmc_dump_command(struct sdmmc_softc *, struct sdmmc_command *);
#define DPRINTF(n,s) do { if ((n) <= sdmmcdebug) printf s; } while (0)
#else
Index: sdmmc_io.c
===================================================================
RCS file: /cvsroot/src/sys/dev/sdmmc/sdmmc_io.c,v
retrieving revision 1.20
diff -u -p -r1.20 sdmmc_io.c
--- sdmmc_io.c 24 May 2020 17:26:18 -0000 1.20
+++ sdmmc_io.c 17 Jul 2020 12:41:27 -0000
@@ -75,7 +75,7 @@ sdmmc_io_enable(struct sdmmc_softc *sc)
uint32_t card_ocr;
int error;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
/* Set host mode to SD "combo" card. */
SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE);
@@ -130,7 +130,7 @@ sdmmc_io_enable(struct sdmmc_softc *sc)
}
out:
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
return error;
}
@@ -146,7 +146,7 @@ sdmmc_io_scan(struct sdmmc_softc *sc)
int error;
int i;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
sf0 = sdmmc_function_alloc(sc);
sf0->number = 0;
@@ -179,7 +179,7 @@ sdmmc_io_scan(struct sdmmc_softc *sc)
}
out:
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
}
/*
@@ -192,7 +192,7 @@ sdmmc_io_init(struct sdmmc_softc *sc, st
int error = 0;
uint8_t reg;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
sf->blklen = sdmmc_chip_host_maxblklen(sc->sc_sct, sc->sc_sch);
@@ -271,7 +271,7 @@ sdmmc_io_init(struct sdmmc_softc *sc, st
}
out:
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
return error;
}
@@ -289,9 +289,9 @@ sdmmc_io_function_ready(struct sdmmc_fun
if (sf->number == 0)
return 1; /* FN0 is always ready */
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_IOREADY);
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
return (reg & (1 << sf->number)) != 0;
}
@@ -306,11 +306,11 @@ sdmmc_io_function_enable(struct sdmmc_fu
if (sf->number == 0)
return 0; /* FN0 is always enabled */
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE);
SET(reg, (1U << sf->number));
sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg);
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
retry = 5;
while (!sdmmc_io_function_ready(sf) && retry-- > 0)
@@ -332,11 +332,11 @@ sdmmc_io_function_disable(struct sdmmc_f
if (sf->number == 0)
return; /* FN0 is always enabled */
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE);
CLR(reg, (1U << sf->number));
sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg);
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
}
static int
@@ -650,7 +650,7 @@ sdmmc_io_reset(struct sdmmc_softc *sc)
if (sdmmc_io_rw_direct(sc, NULL, SD_IO_CCCR_CTL, &data,
SD_ARG_CMD52_WRITE, true) == 0)
- sdmmc_pause(100000, NULL); /* XXX SDMMC_LOCK */
+ sdmmc_pause(100000, &sc->sc_mtx);
}
/*
@@ -706,11 +706,11 @@ sdmmc_intr_enable(struct sdmmc_function
struct sdmmc_function *sf0 = sc->sc_fn0;
uint8_t reg;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN);
reg |= 1 << sf->number;
sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg);
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
}
void
@@ -720,11 +720,11 @@ sdmmc_intr_disable(struct sdmmc_function
struct sdmmc_function *sf0 = sc->sc_fn0;
uint8_t reg;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN);
reg &= ~(1 << sf->number);
sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg);
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
}
/*
@@ -831,7 +831,7 @@ sdmmc_io_set_blocklen(struct sdmmc_funct
struct sdmmc_function *sf0 = sc->sc_fn0;
int error = EINVAL;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
if (blklen <= 0 ||
blklen > sdmmc_chip_host_maxblklen(sc->sc_sct, sc->sc_sch))
@@ -846,7 +846,7 @@ sdmmc_io_set_blocklen(struct sdmmc_funct
error = 0;
err:
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
return error;
}
Index: sdmmc_mem.c
===================================================================
RCS file: /cvsroot/src/sys/dev/sdmmc/sdmmc_mem.c,v
retrieving revision 1.72
diff -u -p -r1.72 sdmmc_mem.c
--- sdmmc_mem.c 11 May 2020 09:51:47 -0000 1.72
+++ sdmmc_mem.c 17 Jul 2020 12:41:27 -0000
@@ -63,6 +63,7 @@ __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,
#include <dev/sdmmc/sdmmcreg.h>
#include <dev/sdmmc/sdmmcvar.h>
+#define SDMMC_DEBUG
#ifdef SDMMC_DEBUG
#define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0)
#else
@@ -142,7 +143,7 @@ sdmmc_mem_enable(struct sdmmc_softc *sc)
uint32_t ocr = 0;
int error;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
/* Set host mode to SD "combo" card or SD memory-only. */
CLR(sc->sc_flags, SMF_UHS_MODE);
@@ -262,7 +263,7 @@ mmc_mode:
}
out:
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
if (error)
printf("%s: %s failed with error %d\n", SDMMCDEVNAME(sc),
@@ -326,7 +327,7 @@ sdmmc_mem_scan(struct sdmmc_softc *sc)
int error;
int retry;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
/*
* CMD2 is a broadcast command understood by SD cards and MMC
@@ -418,7 +419,7 @@ sdmmc_mem_scan(struct sdmmc_softc *sc)
#endif
}
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
}
int
@@ -578,7 +579,7 @@ sdmmc_mem_init(struct sdmmc_softc *sc, s
{
int error = 0;
- SDMMC_LOCK(sc);
+ mutex_enter(&sc->sc_mtx);
if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) {
error = sdmmc_select_card(sc, sf);
@@ -599,7 +600,7 @@ sdmmc_mem_init(struct sdmmc_softc *sc, s
SET(sf->flags, SFF_ERROR);
out:
- SDMMC_UNLOCK(sc);
+ mutex_exit(&sc->sc_mtx);
return error;
}
@@ -1042,7 +1043,8 @@ sdmmc_mem_mmc_init(struct sdmmc_softc *s
sc->sc_busclk, false);
if (error) {
aprint_error_dev(sc->sc_dev,
- "can't change bus clock\n");
+ "can't change bus clock (error: %d)\n",
+ error);
return error;
}
}
@@ -1052,7 +1054,8 @@ sdmmc_mem_mmc_init(struct sdmmc_softc *s
MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd));
if (error) {
aprint_error_dev(sc->sc_dev,
- "can't re-read EXT_CSD\n");
+ "can't re-read EXT_CSD (error: %d)\n",
+ error);
return error;
}
if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) {
@@ -1885,7 +1888,6 @@ sdmmc_mem_read_block(struct sdmmc_functi
struct sdmmc_softc *sc = sf->sc;
int error;
- SDMMC_LOCK(sc);
mutex_enter(&sc->sc_mtx);
if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) {
@@ -1936,7 +1938,6 @@ unload:
out:
mutex_exit(&sc->sc_mtx);
- SDMMC_UNLOCK(sc);
return error;
}
@@ -2123,7 +2124,6 @@ sdmmc_mem_write_block(struct sdmmc_funct
struct sdmmc_softc *sc = sf->sc;
int error;
- SDMMC_LOCK(sc);
mutex_enter(&sc->sc_mtx);
if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) {
@@ -2182,7 +2182,6 @@ unload:
out:
mutex_exit(&sc->sc_mtx);
- SDMMC_UNLOCK(sc);
return error;
}
@@ -2200,7 +2199,6 @@ sdmmc_mem_discard(struct sdmmc_function
if (eblkno < sblkno)
return EINVAL;
- SDMMC_LOCK(sc);
mutex_enter(&sc->sc_mtx);
/* Set the address of the first write block to be erased */
@@ -2237,7 +2235,6 @@ sdmmc_mem_discard(struct sdmmc_function
out:
mutex_exit(&sc->sc_mtx);
- SDMMC_UNLOCK(sc);
#ifdef SDMMC_DEBUG
device_printf(sc->sc_dev, "discard blk %u-%u error %d\n",
@@ -2256,7 +2253,6 @@ sdmmc_mem_flush_cache(struct sdmmc_funct
if (!ISSET(sf->flags, SFF_CACHE_ENABLED))
return 0;
- SDMMC_LOCK(sc);
mutex_enter(&sc->sc_mtx);
error = sdmmc_mem_mmc_switch(sf,
@@ -2264,7 +2260,6 @@ sdmmc_mem_flush_cache(struct sdmmc_funct
EXT_CSD_FLUSH_CACHE_FLUSH, poll);
mutex_exit(&sc->sc_mtx);
- SDMMC_UNLOCK(sc);
#ifdef SDMMC_DEBUG
device_printf(sc->sc_dev, "mmc flush cache error %d\n", error);
Index: sdmmcvar.h
===================================================================
RCS file: /cvsroot/src/sys/dev/sdmmc/sdmmcvar.h,v
retrieving revision 1.35
diff -u -p -r1.35 sdmmcvar.h
--- sdmmcvar.h 24 May 2020 17:26:18 -0000 1.35
+++ sdmmcvar.h 17 Jul 2020 12:41:27 -0000
@@ -317,9 +317,6 @@ struct sdmmc_product {
#define splsdmmc() splbio()
#endif
-#define SDMMC_LOCK(sc)
-#define SDMMC_UNLOCK(sc)
-
#ifdef SDMMC_DEBUG
extern int sdmmcdebug;
#endif
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