Subject: Re: Enabling i/o and mem space on PCI bridges
To: Jared D. McNeill <jmcneill@invisible.ca>
From: Allen Briggs <briggs@netbsd.org>
List: tech-kern
Date: 11/27/2007 23:13:03
Hi Jared,

On Tue, Nov 27, 2007 at 08:01:05PM -0500, Jared D. McNeill wrote:
> For some reason 'pci6' on my Thinkpad has memory space access disabled. 
> This prevents fwohci and cbb from working properly.

Ew...  Bogus BIOS?

> I'm using the following patch to make it work for me, but I'm not sure 
> it's correct. Comments?

I'd do it slightly differently.  Instead of 
> +			pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
> +			    csr | sc->sc_flags);

I think I'd do something like:
+			pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
+			    csr | (sc->sc_flags & PCI_COMMAND_MASK) );

Or, to be pedantic, create a new pcireg_t csrmask, and:

+			csrmask = PCI_COMMAND_MASK << PCI_COMMAND_SHIFT;
+			pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
+			    (csr & ~csrmask) | (sc->sc_flags & csrmask) );

I.e., set the status bits that are set in CSR (to clear any errors that
might be set), ignore any command bits that are set in the CSR, and set
any command bits that are set in sc_flags, but ignore the status bits
from sc_flags.

I'd probably also put in a comment that some bridges are not configured
to enable I/O or memory for some reason.  Have you looked to see how
other OSes deal with this?  Does the Thinkpad require special windows
drivers?  Do other bridges do this?

-allen

-- 
Allen Briggs  |  http://www.ninthwonder.com/~briggs/  |  briggs@ninthwonder.com