Subject: Re: lack of pciide transfer alignment checking causes crash
To: Thor Lancelot Simon <tls@rek.tjls.com>
From: Manuel Bouyer <bouyer@antioche.eu.org>
List: tech-kern
Date: 06/26/2005 23:04:21
On Sun, Jun 26, 2005 at 04:27:24PM -0400, Thor Lancelot Simon wrote:
> On Sun, Jun 26, 2005 at 09:53:51PM +0200, Manuel Bouyer wrote:
> > 
> > Right now, bus_dma(9) because it only knows the limitations of the bus
> > (e.g. the 16MB limit for ISA, or 4GB limit for 32bit PCI).
> 
> Why not change the attachments for devices with broken bus interfaces
> to hang them off a fake "bus" that enforces the relevant DMA restrictions?
> 
> After all, logically that's precisely how they are: they aren't on PCI,
> exactly, they're on a broken-bus-interface-"bus" behind the PCI (from
> the CPU's perspective) that enforces restrictions that PCI doesn't have.

The problem is that isn't not easy to do in an MI way. The way the bus_dma
interface is defined and implemented, there's no way to add a new bus
to the bus defined by the machine-dependant code.

-- 
Manuel Bouyer <bouyer@antioche.eu.org>
     NetBSD: 26 ans d'experience feront toujours la difference
--