> > PCI doesn't have a config read or write for anything but 32-bit
> > quantities.
> 
> Are you sure? Looking at the PCI spec, I don't see anything that
> restricts the use of byte lane enables in configuration space, and
> some PCI host bridges explicitly document the connection between byte
> and word reads on the host side and sub-dword accesses on the PCI
> side.

Sounds right, PCI 2.3 explicitely allows use of byte enables during
Configuration Read/Write transaction data phase, see page 22 (36 in
xpdf) of conventional_pci_2_3.pdf. Didn't check earlier revisions
though...

	Regards,
		-- Jachym Holecek