Hi,

> One interesting thing is, when seen through mmap, the 'meaningless' data
> repeats after a page - that is, in this architecture, 4096 bytes. Is 
> that could be some hint?
> 
> Btw, as you can see from the above, it is not a simple endianess 
> problem. I used bus_space interface, and they treat the endianess 
> correctly, AFAIK.

Other thing you can try in localising the problem is to access SRAM via
memory references to the window returned by bus_space_vaddr() and look if
it works (see bus_space(9)).

One bug I can see is that you actually do _not_ map BAR0 as prefetchable
(didn't check closely, but the comment disagrees with the code there).
You do

	flags &= BUS_SPACE_MAP_PREFETCHABLE;

where you supposedly really want

	flags |= BUS_SPACE_MAP_PREFETCHABLE;

Again, I didn't check carefully, but experimenting and looking at
bus_space(9) implementation on your platform can't hurt.

	Regards,
		-- Jachym Holecek