Frederick Bruckman wrote:

> On Wed, 4 Feb 2004, Simon Burge wrote:
> 
> > Looks ok at a glance.  My only question is why the pcireg_t
> > variables need to be volatile in write_siig10x_usrreg() and
> > write_siig20x_usrreg()?
> 
> Originally, I tried to use bus_space_barrier(...,
> BUS_SPACE_BARRIER_READ_BEFORE_WRITE) before pci_conf_write() [*].
> My thinking was, that the compiler would see the registers as being
> set by pci_conf_read(), whereas you might rather think of them as
> being set by bus_space_barrier(), as a side-effect; ergo "volatile".
> 
> I suppose I should either put the bus_space_barrier() back, even with
> the obsolete macros, or take out the volatile.

pci_conf_read/write don't need any barriers.

> [*] That didn't even compile. Is the bus_space(9) man page leading
> the implementation?

You can't use a PCI chipset tag where you need a bus space tag.  How
were you calling bus_space_barrier()?

> Frederick
> 
--
Simon Burge                            <simonb@wasabisystems.com>
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