On Thu, Jul 04, 2002 at 01:06:35PM +1200, Gregory McGarry wrote:

 > I implemented restartable atomic sequences (RAS) to compare their
 > performance with atomic test-and-set instructions.  The RAS facility

Wow, terrific!

 > Anyway, if there aren't any MI uses for this, I'll just stick it
 > in the MD mips trap handler and use sysarch(2) for registration.

The ARM could use it, too.  The SWP instruction isn't available on
all ARM CPUs (older ARM2s lack it), and to make things even happier,
the SWP instruction is not necessarily guaranteed to be atomic on
a non-cacheable region.

It seems like RAS might be useful for other uses within libthread
than just locking primitives for R3000.

Is the code somewhere where we can peek at it?  How much of it can
be reasonably made MI?  I suppose the registration function and the
RAS list on the proc structure, and the lookup function...

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>