On Thu, Aug 03, 2000 at 07:08:07PM +0200, Frederic GILLIERS wrote:
> I guess they are related to the PCI bus configuration cycles, but I'm
> not even sure.
That is preceisely what they are for ... to read/write registers in
PCI configuration space.
--
-- Jason R. Thorpe <thorpej@zembu.com>