Subject: Re: bus.h style question
To: Jason Thorpe <thorpej@nas.nasa.gov>
From: Jonathan Stone <jonathan@DSG.Stanford.EDU>
List: tech-kern
Date: 08/15/1997 19:26:23
Jason Thorpe writes:

>For some busses, the only sane way to treat them is their "native" byte
>order.  I.e. ISA, EISA, and PCI should all be considered "little endian".
>It's my opinion that the bus_space_* functions _should_ perform the
>necessary byte swapping, and the components on boards should always
>be configured for the byte order they'd be configured if the processor
>were little-endian.

We support drivers for devices which map both controller registers and
bytestream data (e.g. PIO registers for reading/writing Ethernet
frames) and into device registers that are indistinguishable to the
bus_space layer.

The only way to make this work with byteswapping is to transform
accesses to 32-bit PIO registers to do byte reads. I'm not sure that
always works, and even if it does, the performance cost is going to be
odious.

>From the perspective of the elink3 driver _only_, forcing byteswapping
into the bus_space_* like this seems like is a bloody awful idea.