> Is it possible that the only machine dependent requirement is the
> acquisition of the DMA bounce buffers ?

as i've said before, NO.

There are a lot of other machine-dependent, and even "hardware that's
in your machine"-dependent requirements.

for instance, should 'inw' and 'outw' byte-swap their arguments,
and/or how should they be swizzled to poke into memory at the right
place?   as i understand it, the need to byte swap on amiga ISA
bridges is dependent on which particular bridge you're using.
Everything about how to do inw, outw, inb, outb, etc., is
machine-dependent on the alpha, from: what _BUS_ to do it on
(there can be mutiple ISA/EISA/PCI busses on some alpha systems!),
to what bit positions in the word written to memory the data has to go
in.

access to device memory is completely machine-dependent, as well.
for instance, on the alpha, it's impossible to do byte-width ISA
memory accesses to a device, if you're using a linear memory map.
(!!!)  According to the HP/Apollo documentation, word writes to ISA
I/O memory need to be byte-swapped...

etc.


There are a _lot_ more variables than just whether or not to 'bounce'
DMA buffers.

I don't think it's a good thing to say "these ports are not yet done"
(some of them _are_ nearly "done," and by the "is it all in the source
tree metric, the Alpha port isn't even done!) when determining how to
properly implement an ISA bus abstraction to be used by
machine-independent drivers.  Otherwise, you'll end up rewriting much
of the ISA code N times, where N is probably log2 of the number of
ports that use it.


chris