> while playing a little with I386 ISA DMA I feel confused about correct
> memory types. Up to now I found the following types in -current sources:
> 
> caddr_t (char *), vm_offset_t (unsigned long), vm_size_t (unsigned long) and
> u_long (unsigned long).
> 
> What are the correct types for virtual adresses, physical adresses and sizes
> of regions in virtual or physical memory.

virtual addresses are correctly named by:
	caddr_t
	vm_offset_t

sizes of virtual regions are correctly named by
	vm_size_t

u_long is not guaranteed to be anything, though on all current systems
that i'm aware of, sizeof(vm_offset_t) == sizeof(u_long) ==
sizeof(char *).


there is no "correct" type for physical addresses & sizes, though the
assumption that the size of the virtual address space is larger than
the physical address space (and therefore, sizeof (vm_offset_t) >=
sizeof (physical address), etc.) is a relatively safe one.


Note that if you're going to talk about _bus_ address spaces, then
you're into a whole other ball of wax.  for instance, take the Alpha,
in particular AlphaStation [2-4]xx PCI-bus systems.

An Alpha system based on a 21064 CPU has 43 bits of virtual address
and 34 bits of physical address.  (pointers and vm offsets & sizes are
64 bits, but the top 22 bits of VAs must be the same.)

The PCI bus on those machines has a 32-bit address space (since they
don't implement 64-bit PCI addresses), which appears in the system
address space in _two_ places:

	0x20.0000000 - 0x2f.ffffffff

		128M of "sparse" PCI space, which allows byte accesses
		to PCI addresses via byte enables.  (it's ugly, if you
		really want to know about it, ask and i'll send a
		pointer.)  This region is not prefetchable.

	0x30.0000000 - 0x3f.ffffffff

		The full 4G PCI address space, accessible only via
		32-bit and 64-bit loads and stores.  This region
		is prefetchable.

PCI devices talk to other PCI devices using PCI addresses.  System
memory is mapped starting at 1G (size of 1G, max.) in PCI space.
The low 1G of PCI space (actually, the low 16M; the rest of the low 1G
is used) is used to provide a "virtual DMA" area, so that devices
which need to DMA to the low 16M can read/write to any portion of
memory easily.

The upshot of this is that one also needs bus-specific address/size
types, and that device drivers that are intended to be 'shareable'
should never use vtophys().


If you think about this for a minute, you'll realize that the way the
current ISA/EISA/PCI code handles addressing is _VERY_ x86 specific.
Indeed, the ISA/EISA/PCI code that i'm using on the Alpha looks
almost _nothing_ like that in the master source tree.  (ask me for a
pointer to the sources, if you'd like to grab them; i don't think i've
put up a copy of my latest sources yet, but want to do so...  too
busy...)



chris