Subject: Re: make includes optimization
To: Chris G. Demetriou <cgd@netbsd.org>
From: None <erh@nimenees.com>
List: tech-install
Date: 02/14/2000 15:17:25
On Mon, Feb 14, 2000 at 12:22:57PM -0800, Chris G. Demetriou wrote:
> I don't think so. If you say 'make a b c', you want the dependencies
> evaluated only once.
>
> consider the overly-simplistic case:
> .PHONY: foo
> foo:
> echo FOO!
> a b c: foo
> echo $@
> 'make a b c' will run the rules for 'foo' once, 'make a && make b &&
> make c' will do it three times. While the problem is obvious when
> .PHONY targets are used, doing the makes separately obviously cause
> more system activity than a single make. 8-)
ah, ok, that clears things up a bit. and I see why make(...)
isn't completely workable. (if the action of the foo depends on an
.if make(b), then make a b will do the wrong foo for a, and since it's
already done foo, it can't do a different one for b.) thanks for
the explanation.
eric