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CVS commit: src/sys/arch/x86/x86



Module Name:    src
Committed By:   andvar
Date:           Mon Sep 28 19:09:21 UTC 2026

Modified Files:
        src/sys/arch/x86/x86: tsc.c

Log Message:
Add Centaur cpuid and family 7 to check whether the TSC counter is invariant.

Recent Zhaoxin CPUs have an invariant TSC and advertise that through
CPUID 80000007, as Intel and AMD do.

Allows choosing the TSC timecounter as more reliable than HPET.

XXX pullup-11, and perhaps netbsd-10.


To generate a diff of this commit:
cvs rdiff -u -r1.64 -r1.65 src/sys/arch/x86/x86/tsc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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