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CVS commit: src/sys



Module Name:    src
Committed By:   jdc
Date:           Mon Feb 16 16:29:59 UTC 2026

Modified Files:
        src/sys/arch/sparc64/dev: bq4802_ebus.c
        src/sys/dev/ic: bq4802reg.h

Log Message:
Use the correct setting for the stop bit, so that the clock runs when the
power is off (instead of vice versa).  Make this clearer in the header.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/sparc64/dev/bq4802_ebus.c
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/ic/bq4802reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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