CVS commit: src/sys/arch/m68k/m68k

["Jason R Thorpe" <thorpej%netbsd.org@localhost>]

Module Name:    src
Committed By:   thorpej
Date:           Mon Nov 24 05:40:36 UTC 2025

Modified Files:
        src/sys/arch/m68k/m68k: pmap_68k.c

Log Message:
Work-in-progress.  It's not quite working yet, but if the option isn't
defined, everyhing still works:

In the Hibler/Utah pmap, the kernel PTE array was placed right near
the very top of the kernel virtual address space.  This was because
of the hp300's unique physical memory arrangement: the last page of
memory is always located at PA $FFFF.F000 and the physical address
of the beginning of RAM varied based on the RAM size.  This meant that
VA $FFFF.F000 is a convenient place to map the RAM VA==PA, making
transition between "MMU off" and "MMU on" (and vice versa) easier.
Since VA $FFFF.F000 was already going to be mapped, it made sense to
put something else along side of it in order to minimize waste in
PT pages.

As noted above, this implementation is tuned for a growing-from-0
virtual space layout.  However, we have a special case for this
particular requirement: if a platform defines SYSMAP_VA, then we
will assume it is as a high address, place the kernel PTE array at
that KVA, and ensure sufficient page tables to map from that VA until
the very end of the 4GB supervisor address space.  These tables will
be allocated before the machine_bootmap[] is processed to map physical
addresses, thus allowing the machine_bootmap[] use it to map physical
addresses into one of these high virtual addresses if necessary.  The
beginning of this region will also serve to clamp the maximum kernel
virtual address, in the same way as a KEEPOUT region in machine_bootmap[].

For reference, the traditional hp300 definition is:

#define SYSMAP_VA       ((vaddr_t)(0-PAGE_SIZE*NPTEPG*2))

...and because the hp300 always used a 4KB page size (restriction
of HP MMU), this is: 0 - 4096*1024*2
                  -> 0 - 8388608 (8MB)
                  -> $FF80.0000

Unfortunately (for the hp300), this means 2 PT pages for the top of
the address space (in the 2-level case), but that's unavoidable anyway
because of the last page being a separate mapping and the kernel PTE
array needs 4MB of space on its own.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/m68k/m68k/pmap_68k.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.