CVS commit: [netbsd-11] src/sys/arch/riscv

["Martin Husemann" <martin%netbsd.org@localhost>]

Module Name:    src
Committed By:   martin
Date:           Sun Oct 26 12:26:27 UTC 2025

Modified Files:
        src/sys/arch/riscv/include [netbsd-11]: pmap.h pte.h sysreg.h
        src/sys/arch/riscv/riscv [netbsd-11]: bus_space.c cpu.c genassym.cf
            locore.S pmap_machdep.c riscv_machdep.c

Log Message:
Pull up following revision(s) (requested by skrll in ticket #67):

        sys/arch/riscv/include/sysreg.h: revision 1.34
        sys/arch/riscv/include/pte.h: revision 1.15
        sys/arch/riscv/include/pte.h: revision 1.16
        sys/arch/riscv/riscv/genassym.cf: revision 1.17
        sys/arch/riscv/riscv/locore.S: revision 1.47
        sys/arch/riscv/riscv/bus_space.c: revision 1.3
        sys/arch/riscv/include/pmap.h: revision 1.25
        sys/arch/riscv/riscv/pmap_machdep.c: revision 1.22
        sys/arch/riscv/riscv/pmap_machdep.c: revision 1.23
        sys/arch/riscv/riscv/cpu.c: revision 1.10
        sys/arch/riscv/riscv/riscv_machdep.c: revision 1.46

Deal with the non-standard XTheadMae (Memory Attribute Extensions)
present on some T-Head CPU cores, notably the one found in the
Allwinner D1 SoC.

This extension allows memory attributes (cacheable, bufferable,
strongly-ordered, etc.) to be specified on a per-mapping basis.

Alas, it has two unfortunate properties:
- It uses the same bits as the standard Svpbmt (Page Based Memory Types)
   extension, and the bits are completely incompatible.
- Unlike Svpbmt, which if none of its extension bits are set in the
   PTE, results in rational behavior, if you don't set the XTheadMae
   attibutes in the PTE correctly, the system will blow up in your face
   in interesting and unpredictable ways.

So, we have to probe for XTheadMae early, when we're setting up the
initial MMU tables so that the kernel is mapped correctly when the
MMU is enabled, and then we probe for it again to set some globals
that are used when creating PTEs for new kernel and user mappings
going forward.  Luckily, there are combinations of XTheadMae attributes
that map reasonably well to the Svpbmt types, so Svpbmt is used as
the abstraction.

With this, my D1 Nezha board boots to the root device prompt. \o/

Fix RV32 build. Svpbmt and Memory Attribute Extension (XTheadMae) are
SV39 and above only.


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.24.2.1 src/sys/arch/riscv/include/pmap.h
cvs rdiff -u -r1.14 -r1.14.2.1 src/sys/arch/riscv/include/pte.h
cvs rdiff -u -r1.33 -r1.33.4.1 src/sys/arch/riscv/include/sysreg.h
cvs rdiff -u -r1.2 -r1.2.8.1 src/sys/arch/riscv/riscv/bus_space.c
cvs rdiff -u -r1.7.2.1 -r1.7.2.2 src/sys/arch/riscv/riscv/cpu.c
cvs rdiff -u -r1.16 -r1.16.4.1 src/sys/arch/riscv/riscv/genassym.cf
cvs rdiff -u -r1.46 -r1.46.2.1 src/sys/arch/riscv/riscv/locore.S
cvs rdiff -u -r1.21 -r1.21.2.1 src/sys/arch/riscv/riscv/pmap_machdep.c
cvs rdiff -u -r1.43 -r1.43.2.1 src/sys/arch/riscv/riscv/riscv_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.