CVS commit: [netbsd-9] src

["Martin Husemann" <martin%netbsd.org@localhost>]

Module Name:    src
Committed By:   martin
Date:           Sun Oct 19 10:44:33 UTC 2025

Modified Files:
        src/distrib/sets/lists/comp [netbsd-9]: mi
        src/share/man/man9 [netbsd-9]: Makefile
        src/sys/arch/aarch64/aarch64 [netbsd-9]: aarch64_machdep.c
        src/sys/arch/alpha/alpha [netbsd-9]: locore.s
        src/sys/arch/amd64/amd64 [netbsd-9]: cpufunc.S
        src/sys/arch/arm/arm32 [netbsd-9]: arm32_machdep.c
        src/sys/arch/hppa/hppa [netbsd-9]: support.S
        src/sys/arch/i386/i386 [netbsd-9]: cpufunc.S
        src/sys/arch/mips/mips [netbsd-9]: cpu_subr.c
        src/sys/arch/sparc/sparc [netbsd-9]: locore.s
        src/sys/arch/sparc64/sparc64 [netbsd-9]: locore.s
Added Files:
        src/share/man/man9 [netbsd-9]: paravirt_membar_sync.9
        src/sys/sys [netbsd-9]: paravirt_membar.h

Log Message:
Pull up following revision(s) (requested by riastradh in ticket #60):

        sys/arch/sparc/sparc/locore.s: revision 1.287
        share/man/man9/Makefile: revision 1.475
        sys/arch/mips/mips/cpu_subr.c: revision 1.65
        sys/arch/mips/mips/cpu_subr.c: revision 1.66
        sys/arch/amd64/amd64/cpufunc.S: revision 1.70
        sys/arch/hppa/hppa/support.S: revision 1.9
        sys/arch/alpha/alpha/locore.s: revision 1.145
        share/man/man9/paravirt_membar_sync.9: revision 1.1
        sys/arch/sparc64/sparc64/locore.s: revision 1.436
        distrib/sets/lists/comp/mi: revision 1.2499
        sys/arch/i386/i386/cpufunc.S: revision 1.54
        sys/sys/paravirt_membar.h: revision 1.1
        sys/arch/arm/arm/cpu_subr.c: revision 1.6
        (all via patch)

paravirt_membar_sync(9): New memory barrier.

For use in paravirtualized drivers which require store-before-load
ordering -- irrespective of whether the kernel is built for a single
processor, or whether the (virtual) machine is booted with a single
processor.

This is even required on architectures that don't even have a
store-before-load ordering barrier, like m68k; adding, e.g., a virtio
bus is _as if_ the architecture has been extended with relaxed memory
ordering when talking with that new bus.  Such architectures need
some way to request the hypervisor enforce that ordering -- on m68k,
that's done by issuing a CASL instruction, which qemu maps to an
atomic r/m/w with sequential consistency ordering in the host.

PR kern/59618: occasional virtio block device lock ups/hangs

mips: Fix asm arch options in new paravirt_membar_sync.
Need to explicitly enable mips2 (MIPS-II) instructions in order to
use sync.  Fixes:
/tmp/ccxgOmXc.s: Assembler messages:
/tmp/ccxgOmXc.s:3576: Error: opcode not supported on this processor: mips1 (mips1) `sync'
--- cpu_subr.o ---
*** Failed target: cpu_subr.o

PR kern/59618: occasional virtio block device lock ups/hangs


To generate a diff of this commit:
cvs rdiff -u -r1.2278.2.9 -r1.2278.2.10 src/distrib/sets/lists/comp/mi
cvs rdiff -u -r1.437.2.4 -r1.437.2.5 src/share/man/man9/Makefile
cvs rdiff -u -r0 -r1.1.6.2 src/share/man/man9/paravirt_membar_sync.9
cvs rdiff -u -r1.28.4.4 -r1.28.4.5 \
    src/sys/arch/aarch64/aarch64/aarch64_machdep.c
cvs rdiff -u -r1.123.4.1 -r1.123.4.2 src/sys/arch/alpha/alpha/locore.s
cvs rdiff -u -r1.43 -r1.43.2.1 src/sys/arch/amd64/amd64/cpufunc.S
cvs rdiff -u -r1.128.2.1 -r1.128.2.2 src/sys/arch/arm/arm32/arm32_machdep.c
cvs rdiff -u -r1.7 -r1.7.4.1 src/sys/arch/hppa/hppa/support.S
cvs rdiff -u -r1.34 -r1.34.2.1 src/sys/arch/i386/i386/cpufunc.S
cvs rdiff -u -r1.34 -r1.34.4.1 src/sys/arch/mips/mips/cpu_subr.c
cvs rdiff -u -r1.274.2.1 -r1.274.2.2 src/sys/arch/sparc/sparc/locore.s
cvs rdiff -u -r1.421.2.1 -r1.421.2.2 src/sys/arch/sparc64/sparc64/locore.s
cvs rdiff -u -r0 -r1.1.6.2 src/sys/sys/paravirt_membar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.