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CVS commit: [netbsd-11] src/sys/arch/riscv/riscv
Module Name: src
Committed By: martin
Date: Thu Oct 9 09:25:52 UTC 2025
Modified Files:
src/sys/arch/riscv/riscv [netbsd-11]: cpu.c trap.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #48):
sys/arch/riscv/riscv/trap.c: revision 1.31
sys/arch/riscv/riscv/cpu.c: revision 1.8
sys/arch/riscv/riscv/cpu.c: revision 1.9
whitespace
Attach the fpu {loads,save,reenable} event counters.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.7.2.1 src/sys/arch/riscv/riscv/cpu.c
cvs rdiff -u -r1.30 -r1.30.2.1 src/sys/arch/riscv/riscv/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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