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CVS commit: src/sys/dtb/riscv
Module Name: src
Committed By: rillig
Date: Thu Sep 18 21:57:57 UTC 2025
Modified Files:
src/sys/dtb/riscv/allwinner: Makefile
src/sys/dtb/riscv/canaan: Makefile
src/sys/dtb/riscv/microchip: Makefile
src/sys/dtb/riscv/renesas: Makefile
src/sys/dtb/riscv/sifive: Makefile
src/sys/dtb/riscv/sophgo: Makefile
src/sys/dtb/riscv/starfive: Makefile
src/sys/dtb/riscv/thead: Makefile
Log Message:
riscv: prevent "internal option" warning from make
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/allwinner/Makefile
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/canaan/Makefile
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/microchip/Makefile
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/renesas/Makefile
cvs rdiff -u -r1.2 -r1.3 src/sys/dtb/riscv/sifive/Makefile
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/sophgo/Makefile
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/starfive/Makefile
cvs rdiff -u -r1.1 -r1.2 src/sys/dtb/riscv/thead/Makefile
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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