CVS commit: src/sys/arch/riscv/include

["Simon Burge" <simonb%netbsd.org@localhost>]

Module Name:    src
Committed By:   simonb
Date:           Tue Nov  8 13:35:32 UTC 2022

Modified Files:
        src/sys/arch/riscv/include: sysreg.h

Log Message:
Add cause register trap types, and some macros to access cause register
fields.


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/riscv/include/sysreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.