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CVS commit: src/sys



Module Name:    src
Committed By:   andvar
Date:           Sun Sep 25 12:41:46 UTC 2022

Modified Files:
        src/sys/arch/hpcmips/isa: isa_machdep.c
        src/sys/arch/mips/alchemy/dev: aupcmcia.c
        src/sys/dev/i2c: sensirion_voc_algorithm.h
        src/sys/dev/pci: if_bce.c

Log Message:
s/inerrupt/interrupt/ and s/intrrupt/interrupt/ in comments.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/hpcmips/isa/isa_machdep.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/alchemy/dev/aupcmcia.c
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/i2c/sensirion_voc_algorithm.h
cvs rdiff -u -r1.61 -r1.62 src/sys/dev/pci/if_bce.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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