CVS commit: src/sys/dev/pci/ixgbe

["Ryo Shimizu" <ryo%netbsd.org@localhost>]

Module Name:    src
Committed By:   ryo
Date:           Thu May 20 01:02:42 UTC 2021

Modified Files:
        src/sys/dev/pci/ixgbe: ix_txrx.c

Log Message:
Added BUS_DMA_COHERENT flag to bus_dmamem_map() to improve stability on aarch64.

In ixgbe, TX/RX descriptor rings are configured in 16-byte units.
If BUS_DMA_COHERENT is not specified, cpu cache (writeback/invalidate)
operations by bus_dmamap_sync() in aarch64 (arm/arm32/bus_dma.c) are done per
cache line size (usually 64 bytes). As a result, adjacent descriptors conflict
with the DMA operation, resulting in unstable operation.

To avoid this, descriptors area should be mapped as non-cache with BUS_DMA_COHERENT.

thanks to msaitoh@ for his help in debugging.


To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/dev/pci/ixgbe/ix_txrx.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.