CVS commit: src/sys/arch/aarch64/aarch64

["Jared D. McNeill" <jmcneill%netbsd.org@localhost>]

Module Name:    src
Committed By:   jmcneill
Date:           Sat Jan  9 15:07:42 UTC 2021

Modified Files:
        src/sys/arch/aarch64/aarch64: locore.S

Log Message:
Avoid mismatched memory attributes for kernel and page table memory.

The initial page table code enters mappings first through an identity
mapped normal-NC mapping. Then later on, additional mappings are added
through a KVA-mapped normal-WB mapping. There is a warning about this
in the Armv8 ARM:

  Bytes written without the Write-Back cacheable attribute within the
  same Write-Back granule as bytes written with the Write-Back cacheable
  attribute might have their values reverted to the old values as a result
  of cache Write-Back.

Change the identity mapping attributes to match the KVA-mapping. This
fixes an issue where the kernel often doesn't start under ESXi-Arm Fling.


To generate a diff of this commit:
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/aarch64/aarch64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.