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CVS commit: src/sys/arch/aarch64/aarch64

Module Name:    src
Committed By:   rin
Date:           Thu Feb 20 12:15:33 UTC 2020

Modified Files:
        src/sys/arch/aarch64/aarch64: trap.c

Log Message:
When emulating obsoleted arm32 instructions, use ufetch(9) rather than
dereference tf_pc directly to retrieve an instruction.

Even if tf_pc is valid when processor decodes the instruction, someone
can unmap its page before tf_pc is read in the exception handler.

Now, SIGSEGV is delivered correctly to the process in this case, rather
than kernel panic.

Pointed out by maxv.
Discussed with ryo and skrll.

To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/aarch64/aarch64/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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