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CVS commit: src/sys



Module Name:    src
Committed By:   martin
Date:           Thu Jan  9 16:23:42 UTC 2020

Modified Files:
        src/sys/arch/aarch64/aarch64: cpu.c
        src/sys/arch/arm/arm32: cpu.c
        src/sys/dev/fdt: fdtbus.c

Log Message:
When attaching the first fdtbus, use the root "comptabile" (or failing that:
"model") property to set the cpu model (in userland aka sysctl hw.model).
When attaching the first cpu, do not overwrite a cpu model if it already
had been set.


To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.137 -r1.138 src/sys/arch/arm/arm32/cpu.c
cvs rdiff -u -r1.30 -r1.31 src/sys/dev/fdt/fdtbus.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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