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CVS commit: src/sys/arch/aarch64/aarch64



Module Name:    src
Committed By:   skrll
Date:           Mon Dec 30 15:54:55 UTC 2019

Modified Files:
        src/sys/arch/aarch64/aarch64: aarch64_machdep.c

Log Message:
Flush the cache and disable TTBR0 translations once we're done with
them in cpu_kernel_vm_init

The Cortex A72s in RPI4 need the cache flush for some reason.


To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/aarch64/aarch64/aarch64_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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