CVS commit: src/sys/arch/x86/x86

["Taylor R Campbell" <riastradh%netbsd.org@localhost>]

Module Name:    src
Committed By:   riastradh
Date:           Mon Dec  2 08:33:52 UTC 2019

Modified Files:
        src/sys/arch/x86/x86: bus_space.c

Log Message:
Use LFENCE/SFENCE/MFENCE in x86 bus_space_barrier.

These are needed for BUS_SPACE_MAP_PREFETCHABLE mappings.  On x86,
these are WC-type memory regions, which means -- unlike normal
WB-type memory regions -- loads can be reordered with loads,
requiring LFENCE, and stores can be reordered with stores, requiring
SFENCE.

Reference: AMD64 Architecture Programmer's Manual, Volume 2: System
Programming, Sec. 7.4.1 `Memory Barrier Interaction with Memory
Types', Table 7-3 `Memory Access Ordering Rules'.


To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/x86/x86/bus_space.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.