CVS commit: src/tests/kernel/arch/amd64

["Kamil Rytarowski" <kamil%netbsd.org@localhost>]

Module Name:    src
Committed By:   kamil
Date:           Sun Dec  4 03:38:58 UTC 2016

Modified Files:
        src/tests/kernel/arch/amd64: t_ptrace_wait.c

Log Message:
Add dbregs_dr[0123]_trap_variable in arch/amd64/t_ptrace_wait*

Add new preliminary tests for testing that CPU Debug Registers can be used
to trap on a variable (write operation).

dbregs_dr0_trap_variable:
    Verify that setting trap with DR0 triggers SIGTRAP

dbregs_dr1_trap_variable:
    Verify that setting trap with DR1 triggers SIGTRAP

dbregs_dr2_trap_variable:
    Verify that setting trap with DR2 triggers SIGTRAP

dbregs_dr3_trap_variable:
    Verify that setting trap with DR3 triggers SIGTRAP

Sponsored by <The NetBSD Foundation>


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/tests/kernel/arch/amd64/t_ptrace_wait.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.