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CVS commit: src/sys/arch/arm



Module Name:    src
Committed By:   skrll
Date:           Tue Jun  9 08:09:24 UTC 2015

Modified Files:
        src/sys/arch/arm/arm32: genassym.cf
        src/sys/arch/arm/include: locore.h

Log Message:
Trailing whitespace.


To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/arm/arm32/genassym.cf
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/include/locore.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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