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CVS commit: src/sys/arch/x86/include



Module Name:    src
Committed By:   msaitoh
Date:           Sat Sep 14 17:21:19 UTC 2013

Modified Files:
        src/sys/arch/x86/include: cacheinfo.h

Log Message:
Add Shared L2 TLB and some cache and tlb entries from the latest document.


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/x86/include/cacheinfo.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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