CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi

[Cliff Neighbors <cliff%netbsd.org@localhost>]

Module Name:    src
Committed By:   cliff
Date:           Sat Dec 12 00:18:34 UTC 2009

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c

Log Message:
- in ipl_sr_bits[], ensure ints for unused vectors are always disabled
  and ensure that MIPS_INT_MASK_5 (clock) is enabled as needed
- break IRT entry management out into routines;
  this allows e.g. setup of IRT entry for clock without all the
  rest of rmixl_intr_irt_establish()
- evbmips_intr_init() now creates IRT entry for mips3 clock interrupt


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.